coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
snps_usb_phy.h
Go to the documentation of this file.
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <
device/mmio.h
>
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#include <
console/console.h
>
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struct
usb_board_data
{
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/*Register values going to override from the boardfile*/
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u8
parameter_override_x0
;
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u8
parameter_override_x1
;
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u8
parameter_override_x2
;
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u8
parameter_override_x3
;
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};
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struct
hs_usb_phy_reg
{
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u8
rsvd1
[60];
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u32
utmi_ctrl0
;
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u32
utmi_ctrl1
;
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u8
rsvd2
[12];
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u32
utmi_ctrl5
;
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u32
hs_phy_ctrl_common0
;
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u32
hs_phy_ctrl_common1
;
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u32
hs_phy_ctrl_common2
;
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u32
hs_phy_ctrl1
;
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u32
hs_phy_ctrl2
;
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u8
rsvd3
[4];
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u32
hs_phy_override_x0
;
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u32
hs_phy_override_x1
;
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u32
hs_phy_override_x2
;
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u32
hs_phy_override_x3
;
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u8
rsvd4
[24];
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u32
cfg0
;
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u8
rsvd5
[8];
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u32
refclk_ctrl
;
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};
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check_member
(
hs_usb_phy_reg
, utmi_ctrl0, 0x03c);
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check_member
(
hs_usb_phy_reg
, utmi_ctrl1, 0x040);
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check_member
(
hs_usb_phy_reg
, utmi_ctrl5, 0x050);
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check_member
(
hs_usb_phy_reg
, hs_phy_ctrl2, 0x064);
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check_member
(
hs_usb_phy_reg
, hs_phy_override_x0, 0x06c);
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check_member
(
hs_usb_phy_reg
, hs_phy_override_x3, 0x078);
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check_member
(
hs_usb_phy_reg
, cfg0, 0x094);
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check_member
(
hs_usb_phy_reg
, refclk_ctrl, 0x0a0);
console.h
mmio.h
check_member
check_member(hs_usb_phy_reg, utmi_ctrl0, 0x03c)
u32
uint32_t u32
Definition:
stdint.h:51
u8
uint8_t u8
Definition:
stdint.h:45
hs_usb_phy_reg
Definition:
qusb_phy.h:91
hs_usb_phy_reg::hs_phy_override_x2
u32 hs_phy_override_x2
Definition:
snps_usb_phy.h:28
hs_usb_phy_reg::hs_phy_ctrl2
u32 hs_phy_ctrl2
Definition:
snps_usb_phy.h:24
hs_usb_phy_reg::hs_phy_override_x1
u32 hs_phy_override_x1
Definition:
snps_usb_phy.h:27
hs_usb_phy_reg::utmi_ctrl5
u32 utmi_ctrl5
Definition:
snps_usb_phy.h:19
hs_usb_phy_reg::rsvd3
u8 rsvd3[4]
Definition:
snps_usb_phy.h:25
hs_usb_phy_reg::rsvd1
u8 rsvd1[60]
Definition:
snps_usb_phy.h:15
hs_usb_phy_reg::hs_phy_override_x3
u32 hs_phy_override_x3
Definition:
snps_usb_phy.h:29
hs_usb_phy_reg::hs_phy_ctrl_common0
u32 hs_phy_ctrl_common0
Definition:
snps_usb_phy.h:20
hs_usb_phy_reg::cfg0
u32 cfg0
Definition:
snps_usb_phy.h:31
hs_usb_phy_reg::hs_phy_ctrl_common2
u32 hs_phy_ctrl_common2
Definition:
snps_usb_phy.h:22
hs_usb_phy_reg::hs_phy_ctrl_common1
u32 hs_phy_ctrl_common1
Definition:
snps_usb_phy.h:21
hs_usb_phy_reg::hs_phy_override_x0
u32 hs_phy_override_x0
Definition:
snps_usb_phy.h:26
hs_usb_phy_reg::hs_phy_ctrl1
u32 hs_phy_ctrl1
Definition:
snps_usb_phy.h:23
hs_usb_phy_reg::utmi_ctrl0
u32 utmi_ctrl0
Definition:
snps_usb_phy.h:16
hs_usb_phy_reg::rsvd2
u8 rsvd2[12]
Definition:
snps_usb_phy.h:18
hs_usb_phy_reg::utmi_ctrl1
u32 utmi_ctrl1
Definition:
snps_usb_phy.h:17
hs_usb_phy_reg::refclk_ctrl
u32 refclk_ctrl
Definition:
snps_usb_phy.h:33
hs_usb_phy_reg::rsvd4
u8 rsvd4[24]
Definition:
snps_usb_phy.h:30
hs_usb_phy_reg::rsvd5
u8 rsvd5[8]
Definition:
snps_usb_phy.h:32
usb_board_data
Definition:
qusb_phy.h:42
usb_board_data::parameter_override_x2
u8 parameter_override_x2
Definition:
snps_usb_phy.h:10
usb_board_data::parameter_override_x0
u8 parameter_override_x0
Definition:
snps_usb_phy.h:8
usb_board_data::parameter_override_x3
u8 parameter_override_x3
Definition:
snps_usb_phy.h:11
usb_board_data::parameter_override_x1
u8 parameter_override_x1
Definition:
snps_usb_phy.h:9
src
soc
qualcomm
common
include
soc
usb
snps_usb_phy.h
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