Macros
#define	SMB_BASE 0x20

#define	HOSTC 0x40

#define	HST_EN (1 << 0)

#define	HOSTC_SMI_EN (1 << 1)

#define	HOSTC_I2C_EN (1 << 2)

#define	TCOBASE 0x50

#define	MASK_TCOBASE 0xffe0

#define	TCOCTL 0x54

#define	TCOBASE_EN (1 << 8)

#define	TCOBASE_LOCK (1 << 0)

#define	SMBUS_SLAVE_ADDR 0x44

#define	PCR_SMBUS_TCOCFG 0x00 /* TCO Configuration register */

#define	PCR_SMBUS_TCOCFG_IE (1 << 7) /* TCO IRQ Enable */

#define	PCR_SMBUS_TCOCFG_IS 7 /* TCO IRQ Select */

#define	PCR_SMBUS_TCOCFG_IRQ_9 0x00

#define	PCR_SMBUS_TCOCFG_IRQ_10 0x01

#define	PCR_SMBUS_TCOCFG_IRQ_11 0x02

#define	PCR_SMBUS_TCOCFG_IRQ_20 0x04 /* only if APIC enabled */

#define	PCR_SMBUS_TCOCFG_IRQ_21 0x05 /* only if APIC enabled */

#define	PCR_SMBUS_TCOCFG_IRQ_22 0x06 /* only if APIC enabled */

#define	PCR_SMBUS_TCOCFG_IRQ_23 0x07 /* only if APIC enabled */

#define	PCR_SMBUS_SMBTM 0x04 /* SMBus Test Mode */

#define	PCR_SMBUS_SMBTM_SMBCT (1 << 1) /* SMBus Counter */

#define	PCR_SMBUS_SMBTM_SMBDG (1 << 0) /* SMBus Deglitch */

#define	PCR_SMBUS_SCTM 0x08 /* Short Counter Test Mode */

#define	PCR_SMBUS_SCTM_SSU (1 << 31) /* Simulation Speed-Up */

#define	PCR_SMBUS_GC 0x0C /* General Control */

#define	PCR_SMBUS_GC_FD (1 << 0) /* Function Disable */

#define	PCR_SMBUS_GC_NR (1 << 1) /* No Reboot */

#define	PCR_SMBUS_GC_SMBSCGE (1 << 2) /* SMB Static Clock Gating Enable */

#define	PCR_SMBUS_PCE 0x10 /* Power Control Enable */

#define	PCR_SMBUS_PCE_HAE (1 << 5) /* Hardware Autonomous Enable */

Macro Definition Documentation

◆ HOSTC

#define HOSTC 0x40

Definition at line 8 of file smbus.h.

◆ HOSTC_I2C_EN

#define HOSTC_I2C_EN (1 << 2)

Definition at line 11 of file smbus.h.

◆ HOSTC_SMI_EN

#define HOSTC_SMI_EN (1 << 1)

Definition at line 10 of file smbus.h.

◆ HST_EN

#define HST_EN (1 << 0)

Definition at line 9 of file smbus.h.

◆ MASK_TCOBASE

#define MASK_TCOBASE 0xffe0

Definition at line 15 of file smbus.h.

◆ PCR_SMBUS_GC

#define PCR_SMBUS_GC 0x0C /* General Control */

Definition at line 40 of file smbus.h.

◆ PCR_SMBUS_GC_FD

#define PCR_SMBUS_GC_FD (1 << 0) /* Function Disable */

Definition at line 41 of file smbus.h.

◆ PCR_SMBUS_GC_NR

#define PCR_SMBUS_GC_NR (1 << 1) /* No Reboot */

Definition at line 42 of file smbus.h.

◆ PCR_SMBUS_GC_SMBSCGE

#define PCR_SMBUS_GC_SMBSCGE (1 << 2) /* SMB Static Clock Gating Enable */

Definition at line 43 of file smbus.h.

◆ PCR_SMBUS_PCE

#define PCR_SMBUS_PCE 0x10 /* Power Control Enable */

Definition at line 44 of file smbus.h.

◆ PCR_SMBUS_PCE_HAE

#define PCR_SMBUS_PCE_HAE (1 << 5) /* Hardware Autonomous Enable */

Definition at line 45 of file smbus.h.

◆ PCR_SMBUS_SCTM

#define PCR_SMBUS_SCTM 0x08 /* Short Counter Test Mode */

Definition at line 38 of file smbus.h.

◆ PCR_SMBUS_SCTM_SSU

#define PCR_SMBUS_SCTM_SSU (1 << 31) /* Simulation Speed-Up */

Definition at line 39 of file smbus.h.

◆ PCR_SMBUS_SMBTM

#define PCR_SMBUS_SMBTM 0x04 /* SMBus Test Mode */

Definition at line 35 of file smbus.h.

◆ PCR_SMBUS_SMBTM_SMBCT

#define PCR_SMBUS_SMBTM_SMBCT (1 << 1) /* SMBus Counter */

Definition at line 36 of file smbus.h.

◆ PCR_SMBUS_SMBTM_SMBDG

#define PCR_SMBUS_SMBTM_SMBDG (1 << 0) /* SMBus Deglitch */

Definition at line 37 of file smbus.h.

◆ PCR_SMBUS_TCOCFG

#define PCR_SMBUS_TCOCFG 0x00 /* TCO Configuration register */

Definition at line 25 of file smbus.h.

◆ PCR_SMBUS_TCOCFG_IE

#define PCR_SMBUS_TCOCFG_IE (1 << 7) /* TCO IRQ Enable */

Definition at line 26 of file smbus.h.

◆ PCR_SMBUS_TCOCFG_IRQ_10

#define PCR_SMBUS_TCOCFG_IRQ_10 0x01

Definition at line 29 of file smbus.h.

◆ PCR_SMBUS_TCOCFG_IRQ_11

#define PCR_SMBUS_TCOCFG_IRQ_11 0x02

Definition at line 30 of file smbus.h.

◆ PCR_SMBUS_TCOCFG_IRQ_20

#define PCR_SMBUS_TCOCFG_IRQ_20 0x04 /* only if APIC enabled */

Definition at line 31 of file smbus.h.

◆ PCR_SMBUS_TCOCFG_IRQ_21

#define PCR_SMBUS_TCOCFG_IRQ_21 0x05 /* only if APIC enabled */

Definition at line 32 of file smbus.h.

◆ PCR_SMBUS_TCOCFG_IRQ_22

#define PCR_SMBUS_TCOCFG_IRQ_22 0x06 /* only if APIC enabled */

Definition at line 33 of file smbus.h.

◆ PCR_SMBUS_TCOCFG_IRQ_23

#define PCR_SMBUS_TCOCFG_IRQ_23 0x07 /* only if APIC enabled */

Definition at line 34 of file smbus.h.

◆ PCR_SMBUS_TCOCFG_IRQ_9

#define PCR_SMBUS_TCOCFG_IRQ_9 0x00

Definition at line 28 of file smbus.h.

◆ PCR_SMBUS_TCOCFG_IS

#define PCR_SMBUS_TCOCFG_IS 7 /* TCO IRQ Select */

Definition at line 27 of file smbus.h.

◆ SMB_BASE

#define SMB_BASE 0x20

Definition at line 7 of file smbus.h.

◆ SMBUS_SLAVE_ADDR

#define SMBUS_SLAVE_ADDR 0x44

Definition at line 20 of file smbus.h.

◆ TCOBASE

#define TCOBASE 0x50

Definition at line 14 of file smbus.h.

◆ TCOBASE_EN

#define TCOBASE_EN (1 << 8)

Definition at line 17 of file smbus.h.

◆ TCOBASE_LOCK

#define TCOBASE_LOCK (1 << 0)

Definition at line 18 of file smbus.h.

◆ TCOCTL

#define TCOCTL 0x54

Definition at line 16 of file smbus.h.

Macros