coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <arch/lib_helpers.h>
#include <arch/stages.h>
#include <cbmem.h>
#include <console/console.h>
#include <device/mmio.h>
#include <soc/addressmap.h>
#include <soc/clock.h>
#include <soc/mmu_operations.h>
#include <soc/mtc.h>
Go to the source code of this file.
Macros | |
#define | ERR_RESP_EN_SLAVE1 (0x1 << 24) |
#define | ERR_RESP_EN_SLAVE2 (0x1 << 25) |
#define | WRAP_TO_INCR_SLAVE0 (0x1 << 27) |
#define | WRAP_TO_INCR_SLAVE1 (0x1 << 28) |
#define | WRAP_TO_INCR_SLAVE2 (0x1 << 29) |
Functions | |
static void | arm64_arch_timer_init (void) |
static void | mselect_enable_wrap (void) |
void | ramstage_entry (void) |
#define ERR_RESP_EN_SLAVE1 (0x1 << 24) |
#define ERR_RESP_EN_SLAVE2 (0x1 << 25) |
#define WRAP_TO_INCR_SLAVE0 (0x1 << 27) |
#define WRAP_TO_INCR_SLAVE1 (0x1 << 28) |
#define WRAP_TO_INCR_SLAVE2 (0x1 << 29) |
Definition at line 13 of file ramstage.c.
References clock_get_osc_khz().
Referenced by ramstage_entry().
Definition at line 20 of file ramstage.c.
References ERR_RESP_EN_SLAVE1, ERR_RESP_EN_SLAVE2, read32(), TEGRA_MSELECT_CONFIG, WRAP_TO_INCR_SLAVE0, WRAP_TO_INCR_SLAVE1, WRAP_TO_INCR_SLAVE2, and write32().
Referenced by ramstage_entry().
Definition at line 41 of file ramstage.c.
References _cbmem_top_ptr, arm64_arch_timer_init(), BIOS_ERR, cbmem_top_chipset(), clock_init_arm_generic_timer(), main(), mselect_enable_wrap(), printk, tegra210_mmu_init(), tegra210_run_mtc(), and trustzone_region_init().