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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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Data Fields | |
u64 | u |
struct { | |
u64 enable: 1 | |
u64 idlelow: 1 | |
u64 clk_cont: 1 | |
u64 wireor: 1 | |
u64 lsbfirst: 1 | |
u64 __pad0__: 2 | |
u64 cshi: 1 | |
u64 idleclks: 2 | |
u64 tristate: 1 | |
u64 cslate: 1 | |
u64 csena: 4 | |
u64 clkdiv: 13 | |
u64 __pad1__: 35 | |
} | s |
u64 cavium_spi_cfg::clk_cont |
Definition at line 23 of file spi.c.
Referenced by spi_set_clock().
u64 cavium_spi_cfg::clkdiv |
Definition at line 32 of file spi.c.
Referenced by spi_get_clock(), and spi_set_clock().
u64 cavium_spi_cfg::csena |
Definition at line 31 of file spi.c.
Referenced by spi_disable(), spi_enable(), spi_set_clock(), spi_set_cs(), and spi_set_lsbmsb().
u64 cavium_spi_cfg::cshi |
Definition at line 27 of file spi.c.
Referenced by spi_set_cs().
u64 cavium_spi_cfg::enable |
Definition at line 21 of file spi.c.
Referenced by spi_disable(), and spi_enable().
u64 cavium_spi_cfg::idleclks |
Definition at line 28 of file spi.c.
Referenced by spi_set_clock().
u64 cavium_spi_cfg::idlelow |
Definition at line 22 of file spi.c.
Referenced by spi_set_clock().
u64 cavium_spi_cfg::lsbfirst |
Definition at line 25 of file spi.c.
Referenced by spi_set_lsbmsb().
struct { ... } cavium_spi_cfg::s |
Referenced by spi_disable(), spi_enable(), spi_get_clock(), spi_set_clock(), spi_set_cs(), and spi_set_lsbmsb().
u64 cavium_spi_cfg::u |
Definition at line 19 of file spi.c.
Referenced by spi_disable(), spi_enable(), spi_get_clock(), spi_set_clock(), spi_set_cs(), and spi_set_lsbmsb().