coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
ddp.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <device/mmio.h>
4 #include <edid.h>
5 #include <soc/addressmap.h>
6 #include <soc/ddp.h>
7 #include <types.h>
8 
9 #define RDMA_FIFO_PSEUDO_SIZE(bytes) (((bytes) / 16) << 16)
10 #define RDMA_OUTPUT_VALID_FIFO_THRESHOLD(bytes) ((bytes) / 16)
11 
12 void ovl_set_roi(u32 idx, u32 width, u32 height, u32 color)
13 {
14  write32(&disp_ovl[idx]->roi_size, height << 16 | width);
15  write32(&disp_ovl[idx]->roi_bgclr, color);
16 }
17 
18 void rdma_start(void)
19 {
21 }
22 
23 void rdma_config(u32 width, u32 height, u32 pixel_clk, u32 fifo_size)
24 {
25  u32 threshold;
26  u32 reg;
27 
30 
31  /*
32  * Enable FIFO underflow since DSI and DPI can't be blocked. Set the
33  * output threshold to 6 microseconds with 7/6 overhead to account for
34  * blanking, and with a pixel depth of 4 bytes:
35  */
36  threshold = pixel_clk * 4 * 7 / 1000;
37 
38  if (threshold > fifo_size)
39  threshold = fifo_size;
40 
43 
44  write32(&disp_rdma0->fifo_con, reg);
45 }
46 
48 {
49 
54 }
55 
57 {
58  struct disp_ovl_regs *const ovl0 = disp_ovl[0];
59  write32(&ovl0->layer[0].con, fmt << 12);
60  write32(&ovl0->layer[0].src_size, height << 16 | width);
61  write32(&ovl0->layer[0].pitch, (width * bpp) & 0xFFFF);
62 
63  /* Enable layer */
64  write32(&ovl0->rdma[0].ctrl, BIT(0));
66 
67  setbits32(&ovl0->src_con, BIT(0));
68 }
static void write32(void *addr, uint32_t val)
Definition: mmio.h:40
static int width
Definition: bochs.c:42
#define RDMA_FIFO_PSEUDO_SIZE(bytes)
Definition: ddp.c:9
void color_start(u32 width, u32 height)
Definition: ddp.c:47
void rdma_config(u32 width, u32 height, u32 pixel_clk, u32 fifo_size)
Definition: ddp.c:23
#define RDMA_OUTPUT_VALID_FIFO_THRESHOLD(bytes)
Definition: ddp.c:10
void ovl_set_roi(u32 idx, u32 width, u32 height, u32 color)
Definition: ddp.c:12
void rdma_start(void)
Definition: ddp.c:18
void ovl_layer_config(u32 fmt, u32 bpp, u32 width, u32 height)
Definition: ddp.c:56
static struct disp_color_regs *const disp_color0
Definition: ddp_common.h:113
static struct disp_rdma_regs *const disp_rdma0
Definition: ddp_common.h:97
static struct disp_ovl_regs *const disp_ovl[2]
Definition: ddp_common.h:61
@ COLOR_BYPASS_ALL
Definition: ddp_common.h:116
@ COLOR_SEQ_SEL
Definition: ddp_common.h:117
@ RDMA_MEM_GMC
Definition: ddp_common.h:93
@ RDMA_FIFO_UNDERFLOW_EN
Definition: ddp_common.h:92
@ RDMA_ENGINE_EN
Definition: ddp_common.h:91
#define BIT(nr)
Definition: ec_commands.h:45
#define setbits32(addr, set)
Definition: mmio.h:21
#define clrsetbits32(addr, clear, set)
Definition: mmio.h:16
uint32_t u32
Definition: stdint.h:51
struct disp_ovl_regs::@685 rdma[4]
u32 mem_gmc_setting
Definition: ddp_common.h:34
struct disp_ovl_regs::@684 layer[4]
#define height