romstage_spd_cbfs.c File Reference

#include <baseboard/variants.h>
#include <ec/google/chromeec/ec.h>
#include <gpio.h>
#include <memory_info.h>
#include <soc/cnl_memcfg_init.h>
#include <soc/romstage.h>
#include <variant/gpio.h>

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Macros
#define	GPIO_MEM_CH_SEL   GPP_F2

Functions
int __weak	variant_memory_sku (void)
void	mainboard_memory_init_params (FSPM_UPD *memupd)

Macro Definition Documentation

GPIO_MEM_CH_SEL

#define GPIO_MEM_CH_SEL   GPP_F2

Definition at line 15 of file romstage_spd_cbfs.c.

Function Documentation

mainboard_memory_init_params()

void mainboard_memory_init_params

(

FSPM_UPD *

memupd

)

Definition at line 29 of file romstage_spd_cbfs.c.

References cannonlake_memcfg_init(), gpio_get(), GPIO_MEM_CH_SEL, memcfg, READ_SPD_CBFS, spd_info::read_type, cnl_mb_cfg::spd, spd_info::spd_data_by::spd_index, spd_info::spd_spec, variant_memory_params(), and variant_memory_sku().

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variant_memory_sku()

int __weak variant_memory_sku

(

void

)

Definition at line 17 of file romstage_spd_cbfs.c.

References ARRAY_SIZE, gpio_base2_value(), GPIO_MEM_CONFIG_0, GPIO_MEM_CONFIG_1, GPIO_MEM_CONFIG_2, and GPIO_MEM_CONFIG_3.

Referenced by mainboard_memory_init_params().

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