coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
soc_intel_baytrail_config Struct Reference

#include <chip.h>

Collaboration diagram for soc_intel_baytrail_config:
Collaboration graph

Data Fields

uint8_t enable_xdp_tap
 
uint8_t sata_port_map
 
uint8_t sata_ahci
 
uint8_t ide_legacy_combined
 
uint8_t clkreq_enable
 
int vnn_ps2_enable
 
int vcc_ps2_enable
 
int disable_slp_x_stretch_sus_fail
 
uint16_t usb2_port_disable_mask
 
uint16_t usb3_port_disable_mask
 
int usb_route_to_xhci
 
uint32_t usb2_per_port_lane0
 
uint32_t usb2_per_port_rcomp_hs_pullup0
 
uint32_t usb2_per_port_lane1
 
uint32_t usb2_per_port_rcomp_hs_pullup1
 
uint32_t usb2_per_port_lane2
 
uint32_t usb2_per_port_rcomp_hs_pullup2
 
uint32_t usb2_per_port_lane3
 
uint32_t usb2_per_port_rcomp_hs_pullup3
 
uint32_t usb2_comp_bg
 
int lpe_codec_clk_freq
 
int lpe_codec_clk_num
 
uint32_t sdcard_cap_low
 
uint32_t sdcard_cap_high
 
int lpss_acpi_mode
 
int scc_acpi_mode
 
int lpe_acpi_mode
 
int pcie_wake_enable
 
uint8_t gpu_pipea_port_select
 
uint16_t gpu_pipea_power_on_delay
 
uint16_t gpu_pipea_light_on_delay
 
uint16_t gpu_pipea_power_off_delay
 
uint16_t gpu_pipea_light_off_delay
 
uint16_t gpu_pipea_power_cycle_delay
 
int gpu_pipea_pwm_freq_hz
 
uint8_t gpu_pipeb_port_select
 
uint16_t gpu_pipeb_power_on_delay
 
uint16_t gpu_pipeb_light_on_delay
 
uint16_t gpu_pipeb_power_off_delay
 
uint16_t gpu_pipeb_light_off_delay
 
uint16_t gpu_pipeb_power_cycle_delay
 
int gpu_pipeb_pwm_freq_hz
 
int disable_ddr_2x_refresh_rate
 
struct i915_gpu_controller_info gfx
 

Detailed Description

Definition at line 12 of file chip.h.

Field Documentation

◆ clkreq_enable

uint8_t soc_intel_baytrail_config::clkreq_enable

Definition at line 17 of file chip.h.

◆ disable_ddr_2x_refresh_rate

int soc_intel_baytrail_config::disable_ddr_2x_refresh_rate

Definition at line 75 of file chip.h.

◆ disable_slp_x_stretch_sus_fail

int soc_intel_baytrail_config::disable_slp_x_stretch_sus_fail

Definition at line 24 of file chip.h.

◆ enable_xdp_tap

uint8_t soc_intel_baytrail_config::enable_xdp_tap

Definition at line 13 of file chip.h.

◆ gfx

struct i915_gpu_controller_info soc_intel_baytrail_config::gfx

Definition at line 75 of file chip.h.

◆ gpu_pipea_light_off_delay

uint16_t soc_intel_baytrail_config::gpu_pipea_light_off_delay

Definition at line 64 of file chip.h.

◆ gpu_pipea_light_on_delay

uint16_t soc_intel_baytrail_config::gpu_pipea_light_on_delay

Definition at line 62 of file chip.h.

◆ gpu_pipea_port_select

uint8_t soc_intel_baytrail_config::gpu_pipea_port_select

Definition at line 60 of file chip.h.

◆ gpu_pipea_power_cycle_delay

uint16_t soc_intel_baytrail_config::gpu_pipea_power_cycle_delay

Definition at line 65 of file chip.h.

◆ gpu_pipea_power_off_delay

uint16_t soc_intel_baytrail_config::gpu_pipea_power_off_delay

Definition at line 63 of file chip.h.

◆ gpu_pipea_power_on_delay

uint16_t soc_intel_baytrail_config::gpu_pipea_power_on_delay

Definition at line 61 of file chip.h.

◆ gpu_pipea_pwm_freq_hz

int soc_intel_baytrail_config::gpu_pipea_pwm_freq_hz

Definition at line 66 of file chip.h.

◆ gpu_pipeb_light_off_delay

uint16_t soc_intel_baytrail_config::gpu_pipeb_light_off_delay

Definition at line 72 of file chip.h.

◆ gpu_pipeb_light_on_delay

uint16_t soc_intel_baytrail_config::gpu_pipeb_light_on_delay

Definition at line 70 of file chip.h.

◆ gpu_pipeb_port_select

uint8_t soc_intel_baytrail_config::gpu_pipeb_port_select

Definition at line 68 of file chip.h.

◆ gpu_pipeb_power_cycle_delay

uint16_t soc_intel_baytrail_config::gpu_pipeb_power_cycle_delay

Definition at line 73 of file chip.h.

◆ gpu_pipeb_power_off_delay

uint16_t soc_intel_baytrail_config::gpu_pipeb_power_off_delay

Definition at line 71 of file chip.h.

◆ gpu_pipeb_power_on_delay

uint16_t soc_intel_baytrail_config::gpu_pipeb_power_on_delay

Definition at line 69 of file chip.h.

◆ gpu_pipeb_pwm_freq_hz

int soc_intel_baytrail_config::gpu_pipeb_pwm_freq_hz

Definition at line 74 of file chip.h.

◆ ide_legacy_combined

uint8_t soc_intel_baytrail_config::ide_legacy_combined

Definition at line 16 of file chip.h.

◆ lpe_acpi_mode

int soc_intel_baytrail_config::lpe_acpi_mode

Definition at line 55 of file chip.h.

◆ lpe_codec_clk_freq

int soc_intel_baytrail_config::lpe_codec_clk_freq

Definition at line 45 of file chip.h.

◆ lpe_codec_clk_num

int soc_intel_baytrail_config::lpe_codec_clk_num

Definition at line 46 of file chip.h.

◆ lpss_acpi_mode

int soc_intel_baytrail_config::lpss_acpi_mode

Definition at line 53 of file chip.h.

◆ pcie_wake_enable

int soc_intel_baytrail_config::pcie_wake_enable

Definition at line 58 of file chip.h.

◆ sata_ahci

uint8_t soc_intel_baytrail_config::sata_ahci

Definition at line 15 of file chip.h.

◆ sata_port_map

uint8_t soc_intel_baytrail_config::sata_port_map

Definition at line 14 of file chip.h.

◆ scc_acpi_mode

int soc_intel_baytrail_config::scc_acpi_mode

Definition at line 54 of file chip.h.

◆ sdcard_cap_high

uint32_t soc_intel_baytrail_config::sdcard_cap_high

Definition at line 50 of file chip.h.

◆ sdcard_cap_low

uint32_t soc_intel_baytrail_config::sdcard_cap_low

Definition at line 49 of file chip.h.

◆ usb2_comp_bg

uint32_t soc_intel_baytrail_config::usb2_comp_bg

Definition at line 42 of file chip.h.

Referenced by usb2_phy_init().

◆ usb2_per_port_lane0

uint32_t soc_intel_baytrail_config::usb2_per_port_lane0

Definition at line 34 of file chip.h.

◆ usb2_per_port_lane1

uint32_t soc_intel_baytrail_config::usb2_per_port_lane1

Definition at line 36 of file chip.h.

◆ usb2_per_port_lane2

uint32_t soc_intel_baytrail_config::usb2_per_port_lane2

Definition at line 38 of file chip.h.

◆ usb2_per_port_lane3

uint32_t soc_intel_baytrail_config::usb2_per_port_lane3

Definition at line 40 of file chip.h.

◆ usb2_per_port_rcomp_hs_pullup0

uint32_t soc_intel_baytrail_config::usb2_per_port_rcomp_hs_pullup0

Definition at line 35 of file chip.h.

◆ usb2_per_port_rcomp_hs_pullup1

uint32_t soc_intel_baytrail_config::usb2_per_port_rcomp_hs_pullup1

Definition at line 37 of file chip.h.

◆ usb2_per_port_rcomp_hs_pullup2

uint32_t soc_intel_baytrail_config::usb2_per_port_rcomp_hs_pullup2

Definition at line 39 of file chip.h.

◆ usb2_per_port_rcomp_hs_pullup3

uint32_t soc_intel_baytrail_config::usb2_per_port_rcomp_hs_pullup3

Definition at line 41 of file chip.h.

◆ usb2_port_disable_mask

uint16_t soc_intel_baytrail_config::usb2_port_disable_mask

Definition at line 27 of file chip.h.

◆ usb3_port_disable_mask

uint16_t soc_intel_baytrail_config::usb3_port_disable_mask

Definition at line 28 of file chip.h.

◆ usb_route_to_xhci

int soc_intel_baytrail_config::usb_route_to_xhci

Definition at line 31 of file chip.h.

◆ vcc_ps2_enable

int soc_intel_baytrail_config::vcc_ps2_enable

Definition at line 21 of file chip.h.

Referenced by punit_init().

◆ vnn_ps2_enable

int soc_intel_baytrail_config::vnn_ps2_enable

Definition at line 20 of file chip.h.

Referenced by punit_init().


The documentation for this struct was generated from the following file: