coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
chip.h
Go to the documentation of this file.
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef __SOC_ROCKCHIP_RK3288_CHIP_H__
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#define __SOC_ROCKCHIP_RK3288_CHIP_H__
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#include <soc/gpio.h>
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#include <
soc/vop.h
>
/* for vop_modes enum used in devicetree.cb */
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struct
soc_rockchip_rk3288_config
{
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u32
vop_id
;
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gpio_t
lcd_bl_pwm_gpio
;
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gpio_t
lcd_bl_en_gpio
;
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u32
bl_power_on_udelay
;
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u32
bl_pwm_to_enable_udelay
;
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u32
framebuffer_bits_per_pixel
;
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u32
vop_mode
;
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};
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#endif
/* __SOC_ROCKCHIP_RK3288_CHIP_H__ */
u32
uint32_t u32
Definition:
stdint.h:51
gpio_t
Definition:
gpio_base.h:7
soc_rockchip_rk3288_config
Definition:
chip.h:9
soc_rockchip_rk3288_config::vop_id
u32 vop_id
Definition:
chip.h:10
soc_rockchip_rk3288_config::lcd_bl_en_gpio
gpio_t lcd_bl_en_gpio
Definition:
chip.h:12
soc_rockchip_rk3288_config::lcd_bl_pwm_gpio
gpio_t lcd_bl_pwm_gpio
Definition:
chip.h:11
soc_rockchip_rk3288_config::vop_mode
u32 vop_mode
Definition:
chip.h:16
soc_rockchip_rk3288_config::bl_power_on_udelay
u32 bl_power_on_udelay
Definition:
chip.h:13
soc_rockchip_rk3288_config::bl_pwm_to_enable_udelay
u32 bl_pwm_to_enable_udelay
Definition:
chip.h:14
soc_rockchip_rk3288_config::framebuffer_bits_per_pixel
u32 framebuffer_bits_per_pixel
Definition:
chip.h:15
vop.h
src
soc
rockchip
rk3288
chip.h
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