coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
Ioh.h File Reference
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Macros

#define BIT0   0x01
 
#define BIT1   0x02
 
#define BIT2   0x04
 
#define BIT3   0x08
 
#define BIT4   0x10
 
#define BIT5   0x20
 
#define BIT6   0x40
 
#define BIT7   0x80
 
#define BIT8   0x100
 
#define BIT9   0x200
 
#define BIT00   0x00000001
 
#define BIT01   0x00000002
 
#define BIT02   0x00000004
 
#define BIT03   0x00000008
 
#define BIT04   0x00000010
 
#define BIT05   0x00000020
 
#define BIT06   0x00000040
 
#define BIT07   0x00000080
 
#define BIT08   0x00000100
 
#define BIT09   0x00000200
 
#define BIT10   0x00000400
 
#define BIT11   0x00000800
 
#define BIT12   0x00001000
 
#define BIT13   0x00002000
 
#define BIT14   0x00004000
 
#define BIT15   0x00008000
 
#define BIT16   0x00010000
 
#define BIT17   0x00020000
 
#define BIT18   0x00040000
 
#define BIT19   0x00080000
 
#define BIT20   0x00100000
 
#define BIT21   0x00200000
 
#define BIT22   0x00400000
 
#define BIT23   0x00800000
 
#define BIT24   0x01000000
 
#define BIT25   0x02000000
 
#define BIT26   0x04000000
 
#define BIT27   0x08000000
 
#define BIT28   0x10000000
 
#define BIT29   0x20000000
 
#define BIT30   0x40000000
 
#define BIT31   0x80000000
 
#define IOH_PCI_CFG_ADDRESS(bus, dev, func, reg)
 
#define INTEL_VENDOR_ID   0x8086
 
#define PCI_REG_VID   0x00
 
#define PCI_REG_DID   0x02
 
#define PCI_REG_PCICMD   0x04
 
#define PCI_REG_PCISTS   0x06
 
#define PCI_REG_RID   0x08
 
#define PCI_REG_PI   0x09
 
#define PCI_REG_SCC   0x0a
 
#define PCI_REG_BCC   0x0b
 
#define PCI_REG_PMLT   0x0d
 
#define PCI_REG_HDR   0x0e
 
#define PCI_REG_PBUS   0x18
 
#define PCI_REG_SBUS   0x19
 
#define PCI_REG_SUBUS   0x1a
 
#define PCI_REG_SMLT   0x1b
 
#define PCI_REG_IOBASE   0x1c
 
#define PCI_REG_IOLIMIT   0x1d
 
#define PCI_REG_SECSTATUS   0x1e
 
#define PCI_REG_MEMBASE   0x20
 
#define PCI_REG_MEMLIMIT   0x22
 
#define PCI_REG_PRE_MEMBASE   0x24
 
#define PCI_REG_PRE_MEMLIMIT   0x26
 
#define PCI_REG_SVID0   0x2c
 
#define PCI_REG_SVID1   0x2d
 
#define PCI_REG_SID0   0x2e
 
#define PCI_REG_SID1   0x2f
 
#define PCI_REG_IOBASE_U   0x30
 
#define PCI_REG_IOLIMIT_U   0x32
 
#define PCI_REG_INTLINE   0x3c
 
#define PCI_REG_BRIDGE_CNTL   0x3e
 
#define PCIE_BRIDGE_VID_DID   0x88008086
 
#define IOH_BUS   0
 
#define IOH_PCI_IOSF2AHB_0_DEV_NUM   0x14
 
#define IOH_PCI_IOSF2AHB_0_MAX_FUNCS   7
 
#define IOH_PCI_IOSF2AHB_1_DEV_NUM   0x15
 
#define IOH_PCI_IOSF2AHB_1_MAX_FUNCS   3
 
#define IOH_USB_BUS_NUMBER   IOH_BUS
 
#define IOH_USB_CONTROLLER_MMIO_RANGE   0x1000
 
#define IOH_MAX_OHCI_USB_CONTROLLERS   1
 
#define IOH_MAX_EHCI_USB_CONTROLLERS   1
 
#define IOH_MAX_USBDEVICE_USB_CONTROLLERS   1
 
#define R_IOH_USB_VENDOR_ID   0x00
 
#define V_IOH_USB_VENDOR_ID   INTEL_VENDOR_ID
 
#define R_IOH_USB_DEVICE_ID   0x02
 
#define R_IOH_USB_COMMAND   0x04
 
#define B_IOH_USB_COMMAND_BME   BIT2
 
#define B_IOH_USB_COMMAND_MSE   BIT1
 
#define B_IOH_USB_COMMAND_ISE   BIT0
 
#define R_IOH_USB_MEMBAR   0x10
 
#define B_IOH_USB_MEMBAR_ADDRESS_MASK   0xFFFFF000
 
#define R_IOH_USB_OHCI_HCCABAR   0x18
 
#define IOH_USB_OHCI_DEVICE_NUMBER   IOH_PCI_IOSF2AHB_0_DEV_NUM
 
#define IOH_OHCI_FUNCTION_NUMBER   0x04
 
#define IOH_USB_EHCI_DEVICE_NUMBER   IOH_PCI_IOSF2AHB_0_DEV_NUM
 
#define IOH_EHCI_FUNCTION_NUMBER   0x03
 
#define R_IOH_EHCI_CAPLENGTH   0x00
 
#define R_IOH_EHCI_INSNREG01   0x94
 
#define B_IOH_EHCI_INSNREG01_OUT_THRESHOLD_BP   (16)
 
#define B_IOH_EHCI_INSNREG01_OUT_THRESHOLD_MASK    (0xff << B_IOH_EHCI_INSNREG01_OUT_THRESHOLD_BP)
 
#define B_IOH_EHCI_INSNREG01_IN_THRESHOLD_BP   (0)
 
#define B_IOH_EHCI_INSNREG01_IN_THRESHOLD_MASK    (0xff << B_IOH_EHCI_INSNREG01_IN_THRESHOLD_BP)
 
#define R_IOH_EHCI_CONFIGFLAGS   0x40
 
#define IOH_USBDEVICE_DEVICE_NUMBER   IOH_PCI_IOSF2AHB_0_DEV_NUM
 
#define IOH_USBDEVICE_FUNCTION_NUMBER   0x02
 
#define R_IOH_USBDEVICE_D_INTR_UDC_REG   0x40c
 
#define R_IOH_USBDEVICE_D_INTR_MSK_UDC_REG   0x410
 
#define B_IOH_USBDEVICE_D_INTR_MSK_UDC_REG_MASK1_MASK   0xff
 
#define R_IOH_USBDEVICE_EP_INTR_UDC_REG   0x414
 
#define R_IOH_USBDEVICE_EP_INTR_MSK_UDC_REG   0x418
 
#define B_IOH_USBDEVICE_EP_INTR_MSK_UDC_REG_OUT_EP_MASK   0x000f0000
 
#define B_IOH_USBDEVICE_EP_INTR_MSK_UDC_REG_IN_EP_MASK   0x0000000f
 
#define IOH_MAC0_BUS_NUMBER   IOH_BUS
 
#define IOH_MAC0_DEVICE_NUMBER   IOH_PCI_IOSF2AHB_0_DEV_NUM
 
#define IOH_MAC0_FUNCTION_NUMBER   0x06
 
#define IOH_MAC1_BUS_NUMBER   IOH_BUS
 
#define IOH_MAC1_DEVICE_NUMBER   IOH_PCI_IOSF2AHB_0_DEV_NUM
 
#define IOH_MAC1_FUNCTION_NUMBER   0x07
 
#define R_IOH_MAC_DEVICE_ID   0x02
 
#define V_IOH_MAC_VENDOR_ID   INTEL_VENDOR_ID
 
#define R_IOH_MAC_DEVICE_ID   0x02
 
#define V_IOH_MAC_DEVICE_ID   0x0937
 
#define R_IOH_MAC_COMMAND   0x04
 
#define B_IOH_MAC_COMMAND_BME   BIT2
 
#define B_IOH_MAC_COMMAND_MSE   BIT1
 
#define B_IOH_MAC_COMMAND_ISE   BIT0
 
#define R_IOH_MAC_MEMBAR   0x10
 
#define B_IOH_MAC_MEMBAR_ADDRESS_MASK   0xFFFFF000
 
#define R_IOH_MAC_GMAC_REG_8   0x20
 
#define B_IOH_MAC_USERVER_MASK   0x0000FF00
 
#define B_IOH_MAC_SNPSVER_MASK   0x000000FF
 
#define R_IOH_MAC_GMAC_REG_16   0x40
 
#define B_IOH_MAC_ADDRHI_MASK   0x0000FFFF
 
#define B_IOH_MAC_AE   BIT31
 
#define R_IOH_MAC_GMAC_REG_17   0x44
 
#define B_IOH_MAC_ADDRLO_MASK   0xFFFFFFFF
 
#define V_IOH_I2C_GPIO_VENDOR_ID   INTEL_VENDOR_ID
 
#define V_IOH_I2C_GPIO_DEVICE_ID   0x0934
 
#define R_IOH_I2C_MEMBAR   0x10
 
#define B_IOH_I2C_GPIO_MEMBAR_ADDR_MASK   0xFFFFF000
 
#define GPIO_SWPORTA_DR   0x00
 
#define GPIO_SWPORTA_DDR   0x04
 
#define GPIO_INTEN   0x30
 
#define GPIO_INTMASK   0x34
 
#define GPIO_INTTYPE_LEVEL   0x38
 
#define GPIO_INT_POLARITY   0x3C
 
#define GPIO_INTSTATUS   0x40
 
#define GPIO_RAW_INTSTATUS   0x44
 
#define GPIO_DEBOUNCE   0x48
 
#define GPIO_PORTA_EOI   0x4C
 
#define GPIO_EXT_PORTA   0x50
 
#define GPIO_EXT_PORTB   0x54
 
#define GPIO_LS_SYNC   0x60
 
#define GPIO_CONFIG_REG2   0x70
 
#define GPIO_CONFIG_REG1   0x74
 
#define R_IOH_UART_MEMBAR   0x10
 
#define B_IOH_UART_MEMBAR_ADDRESS_MASK   0xFFFFF000
 

Macro Definition Documentation

◆ B_IOH_EHCI_INSNREG01_IN_THRESHOLD_BP

#define B_IOH_EHCI_INSNREG01_IN_THRESHOLD_BP   (0)

Definition at line 149 of file Ioh.h.

◆ B_IOH_EHCI_INSNREG01_IN_THRESHOLD_MASK

#define B_IOH_EHCI_INSNREG01_IN_THRESHOLD_MASK    (0xff << B_IOH_EHCI_INSNREG01_IN_THRESHOLD_BP)

Definition at line 150 of file Ioh.h.

◆ B_IOH_EHCI_INSNREG01_OUT_THRESHOLD_BP

#define B_IOH_EHCI_INSNREG01_OUT_THRESHOLD_BP   (16)

Definition at line 146 of file Ioh.h.

◆ B_IOH_EHCI_INSNREG01_OUT_THRESHOLD_MASK

#define B_IOH_EHCI_INSNREG01_OUT_THRESHOLD_MASK    (0xff << B_IOH_EHCI_INSNREG01_OUT_THRESHOLD_BP)

Definition at line 147 of file Ioh.h.

◆ B_IOH_I2C_GPIO_MEMBAR_ADDR_MASK

#define B_IOH_I2C_GPIO_MEMBAR_ADDR_MASK   0xFFFFF000

Definition at line 219 of file Ioh.h.

◆ B_IOH_MAC_ADDRHI_MASK

#define B_IOH_MAC_ADDRHI_MASK   0x0000FFFF

Definition at line 206 of file Ioh.h.

◆ B_IOH_MAC_ADDRLO_MASK

#define B_IOH_MAC_ADDRLO_MASK   0xFFFFFFFF

Definition at line 209 of file Ioh.h.

◆ B_IOH_MAC_AE

#define B_IOH_MAC_AE   BIT31

Definition at line 207 of file Ioh.h.

◆ B_IOH_MAC_COMMAND_BME

#define B_IOH_MAC_COMMAND_BME   BIT2

Definition at line 193 of file Ioh.h.

◆ B_IOH_MAC_COMMAND_ISE

#define B_IOH_MAC_COMMAND_ISE   BIT0

Definition at line 195 of file Ioh.h.

◆ B_IOH_MAC_COMMAND_MSE

#define B_IOH_MAC_COMMAND_MSE   BIT1

Definition at line 194 of file Ioh.h.

◆ B_IOH_MAC_MEMBAR_ADDRESS_MASK

#define B_IOH_MAC_MEMBAR_ADDRESS_MASK   0xFFFFF000

Definition at line 197 of file Ioh.h.

◆ B_IOH_MAC_SNPSVER_MASK

#define B_IOH_MAC_SNPSVER_MASK   0x000000FF

Definition at line 204 of file Ioh.h.

◆ B_IOH_MAC_USERVER_MASK

#define B_IOH_MAC_USERVER_MASK   0x0000FF00

Definition at line 203 of file Ioh.h.

◆ B_IOH_UART_MEMBAR_ADDRESS_MASK

#define B_IOH_UART_MEMBAR_ADDRESS_MASK   0xFFFFF000

Definition at line 242 of file Ioh.h.

◆ B_IOH_USB_COMMAND_BME

#define B_IOH_USB_COMMAND_BME   BIT2

Definition at line 122 of file Ioh.h.

◆ B_IOH_USB_COMMAND_ISE

#define B_IOH_USB_COMMAND_ISE   BIT0

Definition at line 124 of file Ioh.h.

◆ B_IOH_USB_COMMAND_MSE

#define B_IOH_USB_COMMAND_MSE   BIT1

Definition at line 123 of file Ioh.h.

◆ B_IOH_USB_MEMBAR_ADDRESS_MASK

#define B_IOH_USB_MEMBAR_ADDRESS_MASK   0xFFFFF000

Definition at line 126 of file Ioh.h.

◆ B_IOH_USBDEVICE_D_INTR_MSK_UDC_REG_MASK1_MASK

#define B_IOH_USBDEVICE_D_INTR_MSK_UDC_REG_MASK1_MASK   0xff

Definition at line 169 of file Ioh.h.

◆ B_IOH_USBDEVICE_EP_INTR_MSK_UDC_REG_IN_EP_MASK

#define B_IOH_USBDEVICE_EP_INTR_MSK_UDC_REG_IN_EP_MASK   0x0000000f

Definition at line 173 of file Ioh.h.

◆ B_IOH_USBDEVICE_EP_INTR_MSK_UDC_REG_OUT_EP_MASK

#define B_IOH_USBDEVICE_EP_INTR_MSK_UDC_REG_OUT_EP_MASK   0x000f0000

Definition at line 172 of file Ioh.h.

◆ BIT0

#define BIT0   0x01

Definition at line 7 of file Ioh.h.

◆ BIT00

#define BIT00   0x00000001

Definition at line 17 of file Ioh.h.

◆ BIT01

#define BIT01   0x00000002

Definition at line 18 of file Ioh.h.

◆ BIT02

#define BIT02   0x00000004

Definition at line 19 of file Ioh.h.

◆ BIT03

#define BIT03   0x00000008

Definition at line 20 of file Ioh.h.

◆ BIT04

#define BIT04   0x00000010

Definition at line 21 of file Ioh.h.

◆ BIT05

#define BIT05   0x00000020

Definition at line 22 of file Ioh.h.

◆ BIT06

#define BIT06   0x00000040

Definition at line 23 of file Ioh.h.

◆ BIT07

#define BIT07   0x00000080

Definition at line 24 of file Ioh.h.

◆ BIT08

#define BIT08   0x00000100

Definition at line 25 of file Ioh.h.

◆ BIT09

#define BIT09   0x00000200

Definition at line 26 of file Ioh.h.

◆ BIT1

#define BIT1   0x02

Definition at line 8 of file Ioh.h.

◆ BIT10

#define BIT10   0x00000400

Definition at line 27 of file Ioh.h.

◆ BIT11

#define BIT11   0x00000800

Definition at line 28 of file Ioh.h.

◆ BIT12

#define BIT12   0x00001000

Definition at line 29 of file Ioh.h.

◆ BIT13

#define BIT13   0x00002000

Definition at line 30 of file Ioh.h.

◆ BIT14

#define BIT14   0x00004000

Definition at line 31 of file Ioh.h.

◆ BIT15

#define BIT15   0x00008000

Definition at line 32 of file Ioh.h.

◆ BIT16

#define BIT16   0x00010000

Definition at line 33 of file Ioh.h.

◆ BIT17

#define BIT17   0x00020000

Definition at line 34 of file Ioh.h.

◆ BIT18

#define BIT18   0x00040000

Definition at line 35 of file Ioh.h.

◆ BIT19

#define BIT19   0x00080000

Definition at line 36 of file Ioh.h.

◆ BIT2

#define BIT2   0x04

Definition at line 9 of file Ioh.h.

◆ BIT20

#define BIT20   0x00100000

Definition at line 37 of file Ioh.h.

◆ BIT21

#define BIT21   0x00200000

Definition at line 38 of file Ioh.h.

◆ BIT22

#define BIT22   0x00400000

Definition at line 39 of file Ioh.h.

◆ BIT23

#define BIT23   0x00800000

Definition at line 40 of file Ioh.h.

◆ BIT24

#define BIT24   0x01000000

Definition at line 41 of file Ioh.h.

◆ BIT25

#define BIT25   0x02000000

Definition at line 42 of file Ioh.h.

◆ BIT26

#define BIT26   0x04000000

Definition at line 43 of file Ioh.h.

◆ BIT27

#define BIT27   0x08000000

Definition at line 44 of file Ioh.h.

◆ BIT28

#define BIT28   0x10000000

Definition at line 45 of file Ioh.h.

◆ BIT29

#define BIT29   0x20000000

Definition at line 46 of file Ioh.h.

◆ BIT3

#define BIT3   0x08

Definition at line 10 of file Ioh.h.

◆ BIT30

#define BIT30   0x40000000

Definition at line 47 of file Ioh.h.

◆ BIT31

#define BIT31   0x80000000

Definition at line 48 of file Ioh.h.

◆ BIT4

#define BIT4   0x10

Definition at line 11 of file Ioh.h.

◆ BIT5

#define BIT5   0x20

Definition at line 12 of file Ioh.h.

◆ BIT6

#define BIT6   0x40

Definition at line 13 of file Ioh.h.

◆ BIT7

#define BIT7   0x80

Definition at line 14 of file Ioh.h.

◆ BIT8

#define BIT8   0x100

Definition at line 15 of file Ioh.h.

◆ BIT9

#define BIT9   0x200

Definition at line 16 of file Ioh.h.

◆ GPIO_CONFIG_REG1

#define GPIO_CONFIG_REG1   0x74

Definition at line 235 of file Ioh.h.

◆ GPIO_CONFIG_REG2

#define GPIO_CONFIG_REG2   0x70

Definition at line 234 of file Ioh.h.

◆ GPIO_DEBOUNCE

#define GPIO_DEBOUNCE   0x48

Definition at line 229 of file Ioh.h.

◆ GPIO_EXT_PORTA

#define GPIO_EXT_PORTA   0x50

Definition at line 231 of file Ioh.h.

◆ GPIO_EXT_PORTB

#define GPIO_EXT_PORTB   0x54

Definition at line 232 of file Ioh.h.

◆ GPIO_INT_POLARITY

#define GPIO_INT_POLARITY   0x3C

Definition at line 226 of file Ioh.h.

◆ GPIO_INTEN

#define GPIO_INTEN   0x30

Definition at line 223 of file Ioh.h.

◆ GPIO_INTMASK

#define GPIO_INTMASK   0x34

Definition at line 224 of file Ioh.h.

◆ GPIO_INTSTATUS

#define GPIO_INTSTATUS   0x40

Definition at line 227 of file Ioh.h.

◆ GPIO_INTTYPE_LEVEL

#define GPIO_INTTYPE_LEVEL   0x38

Definition at line 225 of file Ioh.h.

◆ GPIO_LS_SYNC

#define GPIO_LS_SYNC   0x60

Definition at line 233 of file Ioh.h.

◆ GPIO_PORTA_EOI

#define GPIO_PORTA_EOI   0x4C

Definition at line 230 of file Ioh.h.

◆ GPIO_RAW_INTSTATUS

#define GPIO_RAW_INTSTATUS   0x44

Definition at line 228 of file Ioh.h.

◆ GPIO_SWPORTA_DDR

#define GPIO_SWPORTA_DDR   0x04

Definition at line 222 of file Ioh.h.

◆ GPIO_SWPORTA_DR

#define GPIO_SWPORTA_DR   0x00

Definition at line 221 of file Ioh.h.

◆ INTEL_VENDOR_ID

#define INTEL_VENDOR_ID   0x8086

Definition at line 57 of file Ioh.h.

◆ IOH_BUS

#define IOH_BUS   0

Definition at line 102 of file Ioh.h.

◆ IOH_EHCI_FUNCTION_NUMBER

#define IOH_EHCI_FUNCTION_NUMBER   0x03

Definition at line 139 of file Ioh.h.

◆ IOH_MAC0_BUS_NUMBER

#define IOH_MAC0_BUS_NUMBER   IOH_BUS

Definition at line 178 of file Ioh.h.

◆ IOH_MAC0_DEVICE_NUMBER

#define IOH_MAC0_DEVICE_NUMBER   IOH_PCI_IOSF2AHB_0_DEV_NUM

Definition at line 179 of file Ioh.h.

◆ IOH_MAC0_FUNCTION_NUMBER

#define IOH_MAC0_FUNCTION_NUMBER   0x06

Definition at line 180 of file Ioh.h.

◆ IOH_MAC1_BUS_NUMBER

#define IOH_MAC1_BUS_NUMBER   IOH_BUS

Definition at line 181 of file Ioh.h.

◆ IOH_MAC1_DEVICE_NUMBER

#define IOH_MAC1_DEVICE_NUMBER   IOH_PCI_IOSF2AHB_0_DEV_NUM

Definition at line 182 of file Ioh.h.

◆ IOH_MAC1_FUNCTION_NUMBER

#define IOH_MAC1_FUNCTION_NUMBER   0x07

Definition at line 183 of file Ioh.h.

◆ IOH_MAX_EHCI_USB_CONTROLLERS

#define IOH_MAX_EHCI_USB_CONTROLLERS   1

Definition at line 115 of file Ioh.h.

◆ IOH_MAX_OHCI_USB_CONTROLLERS

#define IOH_MAX_OHCI_USB_CONTROLLERS   1

Definition at line 114 of file Ioh.h.

◆ IOH_MAX_USBDEVICE_USB_CONTROLLERS

#define IOH_MAX_USBDEVICE_USB_CONTROLLERS   1

Definition at line 116 of file Ioh.h.

◆ IOH_OHCI_FUNCTION_NUMBER

#define IOH_OHCI_FUNCTION_NUMBER   0x04

Definition at line 133 of file Ioh.h.

◆ IOH_PCI_CFG_ADDRESS

#define IOH_PCI_CFG_ADDRESS (   bus,
  dev,
  func,
  reg 
)
Value:
(((UINT32) ((((UINTN)bus) << 24) + (((UINTN)dev) << 16) + \
(((UINTN)func) << 8) + ((UINTN)reg))) & 0x00000000ffffffff)
Definition: device.h:76

Definition at line 51 of file Ioh.h.

◆ IOH_PCI_IOSF2AHB_0_DEV_NUM

#define IOH_PCI_IOSF2AHB_0_DEV_NUM   0x14

Definition at line 103 of file Ioh.h.

◆ IOH_PCI_IOSF2AHB_0_MAX_FUNCS

#define IOH_PCI_IOSF2AHB_0_MAX_FUNCS   7

Definition at line 104 of file Ioh.h.

◆ IOH_PCI_IOSF2AHB_1_DEV_NUM

#define IOH_PCI_IOSF2AHB_1_DEV_NUM   0x15

Definition at line 105 of file Ioh.h.

◆ IOH_PCI_IOSF2AHB_1_MAX_FUNCS

#define IOH_PCI_IOSF2AHB_1_MAX_FUNCS   3

Definition at line 106 of file Ioh.h.

◆ IOH_USB_BUS_NUMBER

#define IOH_USB_BUS_NUMBER   IOH_BUS

Definition at line 112 of file Ioh.h.

◆ IOH_USB_CONTROLLER_MMIO_RANGE

#define IOH_USB_CONTROLLER_MMIO_RANGE   0x1000

Definition at line 113 of file Ioh.h.

◆ IOH_USB_EHCI_DEVICE_NUMBER

#define IOH_USB_EHCI_DEVICE_NUMBER   IOH_PCI_IOSF2AHB_0_DEV_NUM

Definition at line 138 of file Ioh.h.

◆ IOH_USB_OHCI_DEVICE_NUMBER

#define IOH_USB_OHCI_DEVICE_NUMBER   IOH_PCI_IOSF2AHB_0_DEV_NUM

Definition at line 132 of file Ioh.h.

◆ IOH_USBDEVICE_DEVICE_NUMBER

#define IOH_USBDEVICE_DEVICE_NUMBER   IOH_PCI_IOSF2AHB_0_DEV_NUM

Definition at line 161 of file Ioh.h.

◆ IOH_USBDEVICE_FUNCTION_NUMBER

#define IOH_USBDEVICE_FUNCTION_NUMBER   0x02

Definition at line 162 of file Ioh.h.

◆ PCI_REG_BCC

#define PCI_REG_BCC   0x0b

Definition at line 69 of file Ioh.h.

◆ PCI_REG_BRIDGE_CNTL

#define PCI_REG_BRIDGE_CNTL   0x3e

Definition at line 90 of file Ioh.h.

◆ PCI_REG_DID

#define PCI_REG_DID   0x02

Definition at line 63 of file Ioh.h.

◆ PCI_REG_HDR

#define PCI_REG_HDR   0x0e

Definition at line 71 of file Ioh.h.

◆ PCI_REG_INTLINE

#define PCI_REG_INTLINE   0x3c

Definition at line 89 of file Ioh.h.

◆ PCI_REG_IOBASE

#define PCI_REG_IOBASE   0x1c

Definition at line 76 of file Ioh.h.

◆ PCI_REG_IOBASE_U

#define PCI_REG_IOBASE_U   0x30

Definition at line 87 of file Ioh.h.

◆ PCI_REG_IOLIMIT

#define PCI_REG_IOLIMIT   0x1d

Definition at line 77 of file Ioh.h.

◆ PCI_REG_IOLIMIT_U

#define PCI_REG_IOLIMIT_U   0x32

Definition at line 88 of file Ioh.h.

◆ PCI_REG_MEMBASE

#define PCI_REG_MEMBASE   0x20

Definition at line 79 of file Ioh.h.

◆ PCI_REG_MEMLIMIT

#define PCI_REG_MEMLIMIT   0x22

Definition at line 80 of file Ioh.h.

◆ PCI_REG_PBUS

#define PCI_REG_PBUS   0x18

Definition at line 72 of file Ioh.h.

◆ PCI_REG_PCICMD

#define PCI_REG_PCICMD   0x04

Definition at line 64 of file Ioh.h.

◆ PCI_REG_PCISTS

#define PCI_REG_PCISTS   0x06

Definition at line 65 of file Ioh.h.

◆ PCI_REG_PI

#define PCI_REG_PI   0x09

Definition at line 67 of file Ioh.h.

◆ PCI_REG_PMLT

#define PCI_REG_PMLT   0x0d

Definition at line 70 of file Ioh.h.

◆ PCI_REG_PRE_MEMBASE

#define PCI_REG_PRE_MEMBASE   0x24

Definition at line 81 of file Ioh.h.

◆ PCI_REG_PRE_MEMLIMIT

#define PCI_REG_PRE_MEMLIMIT   0x26

Definition at line 82 of file Ioh.h.

◆ PCI_REG_RID

#define PCI_REG_RID   0x08

Definition at line 66 of file Ioh.h.

◆ PCI_REG_SBUS

#define PCI_REG_SBUS   0x19

Definition at line 73 of file Ioh.h.

◆ PCI_REG_SCC

#define PCI_REG_SCC   0x0a

Definition at line 68 of file Ioh.h.

◆ PCI_REG_SECSTATUS

#define PCI_REG_SECSTATUS   0x1e

Definition at line 78 of file Ioh.h.

◆ PCI_REG_SID0

#define PCI_REG_SID0   0x2e

Definition at line 85 of file Ioh.h.

◆ PCI_REG_SID1

#define PCI_REG_SID1   0x2f

Definition at line 86 of file Ioh.h.

◆ PCI_REG_SMLT

#define PCI_REG_SMLT   0x1b

Definition at line 75 of file Ioh.h.

◆ PCI_REG_SUBUS

#define PCI_REG_SUBUS   0x1a

Definition at line 74 of file Ioh.h.

◆ PCI_REG_SVID0

#define PCI_REG_SVID0   0x2c

Definition at line 83 of file Ioh.h.

◆ PCI_REG_SVID1

#define PCI_REG_SVID1   0x2d

Definition at line 84 of file Ioh.h.

◆ PCI_REG_VID

#define PCI_REG_VID   0x00

Definition at line 62 of file Ioh.h.

◆ PCIE_BRIDGE_VID_DID

#define PCIE_BRIDGE_VID_DID   0x88008086

Definition at line 96 of file Ioh.h.

◆ R_IOH_EHCI_CAPLENGTH

#define R_IOH_EHCI_CAPLENGTH   0x00

Definition at line 144 of file Ioh.h.

◆ R_IOH_EHCI_CONFIGFLAGS

#define R_IOH_EHCI_CONFIGFLAGS   0x40

Definition at line 156 of file Ioh.h.

◆ R_IOH_EHCI_INSNREG01

#define R_IOH_EHCI_INSNREG01   0x94

Definition at line 145 of file Ioh.h.

◆ R_IOH_I2C_MEMBAR

#define R_IOH_I2C_MEMBAR   0x10

Definition at line 218 of file Ioh.h.

◆ R_IOH_MAC_COMMAND

#define R_IOH_MAC_COMMAND   0x04

Definition at line 192 of file Ioh.h.

◆ R_IOH_MAC_DEVICE_ID [1/2]

#define R_IOH_MAC_DEVICE_ID   0x02

Definition at line 190 of file Ioh.h.

◆ R_IOH_MAC_DEVICE_ID [2/2]

#define R_IOH_MAC_DEVICE_ID   0x02

Definition at line 190 of file Ioh.h.

◆ R_IOH_MAC_GMAC_REG_16

#define R_IOH_MAC_GMAC_REG_16   0x40

Definition at line 205 of file Ioh.h.

◆ R_IOH_MAC_GMAC_REG_17

#define R_IOH_MAC_GMAC_REG_17   0x44

Definition at line 208 of file Ioh.h.

◆ R_IOH_MAC_GMAC_REG_8

#define R_IOH_MAC_GMAC_REG_8   0x20

Definition at line 202 of file Ioh.h.

◆ R_IOH_MAC_MEMBAR

#define R_IOH_MAC_MEMBAR   0x10

Definition at line 196 of file Ioh.h.

◆ R_IOH_UART_MEMBAR

#define R_IOH_UART_MEMBAR   0x10

Definition at line 241 of file Ioh.h.

◆ R_IOH_USB_COMMAND

#define R_IOH_USB_COMMAND   0x04

Definition at line 121 of file Ioh.h.

◆ R_IOH_USB_DEVICE_ID

#define R_IOH_USB_DEVICE_ID   0x02

Definition at line 120 of file Ioh.h.

◆ R_IOH_USB_MEMBAR

#define R_IOH_USB_MEMBAR   0x10

Definition at line 125 of file Ioh.h.

◆ R_IOH_USB_OHCI_HCCABAR

#define R_IOH_USB_OHCI_HCCABAR   0x18

Definition at line 127 of file Ioh.h.

◆ R_IOH_USB_VENDOR_ID

#define R_IOH_USB_VENDOR_ID   0x00

Definition at line 118 of file Ioh.h.

◆ R_IOH_USBDEVICE_D_INTR_MSK_UDC_REG

#define R_IOH_USBDEVICE_D_INTR_MSK_UDC_REG   0x410

Definition at line 168 of file Ioh.h.

◆ R_IOH_USBDEVICE_D_INTR_UDC_REG

#define R_IOH_USBDEVICE_D_INTR_UDC_REG   0x40c

Definition at line 167 of file Ioh.h.

◆ R_IOH_USBDEVICE_EP_INTR_MSK_UDC_REG

#define R_IOH_USBDEVICE_EP_INTR_MSK_UDC_REG   0x418

Definition at line 171 of file Ioh.h.

◆ R_IOH_USBDEVICE_EP_INTR_UDC_REG

#define R_IOH_USBDEVICE_EP_INTR_UDC_REG   0x414

Definition at line 170 of file Ioh.h.

◆ V_IOH_I2C_GPIO_DEVICE_ID

#define V_IOH_I2C_GPIO_DEVICE_ID   0x0934

Definition at line 216 of file Ioh.h.

◆ V_IOH_I2C_GPIO_VENDOR_ID

#define V_IOH_I2C_GPIO_VENDOR_ID   INTEL_VENDOR_ID

Definition at line 215 of file Ioh.h.

◆ V_IOH_MAC_DEVICE_ID

#define V_IOH_MAC_DEVICE_ID   0x0937

Definition at line 191 of file Ioh.h.

◆ V_IOH_MAC_VENDOR_ID

#define V_IOH_MAC_VENDOR_ID   INTEL_VENDOR_ID

Definition at line 189 of file Ioh.h.

◆ V_IOH_USB_VENDOR_ID

#define V_IOH_USB_VENDOR_ID   INTEL_VENDOR_ID

Definition at line 119 of file Ioh.h.