coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
i82371eb.c
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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/* Note: This code supports the 82371FB/SB/MX/AB/EB/MB and 82437MX. */
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/* Datasheets:
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* - Name: 82371FB (PIIX) AND 82371SB (PIIX3) PCI ISA IDE XCELERATOR
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* - URL: http://www.intel.com/design/intarch/datashts/290550.htm
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* - PDF: http://download.intel.com/design/intarch/datashts/29055002.pdf
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* - Date: April 1997
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* - Order Number: 290550-002
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*
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* - Name: 82371FB (PIIX) and 82371SB (PIIX3) PCI ISA IDE Xcelerator
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* Specification Update
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* - URL: http://www.intel.com/design/chipsets/specupdt/297658.htm
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* - PDF: http://download.intel.com/design/chipsets/specupdt/29765801.pdf
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* - Date: March 1998
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* - Order Number: 297658-004
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*
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* - Name: 82371AB PCI-TO-ISA / IDE XCELERATOR (PIIX4)
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* (applies to 82371AB/EB/MB, a.k.a. PIIX4/PIIX4E/PIIX4M)
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* - URL: http://www.intel.com/design/intarch/datashts/290562.htm
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* - PDF: http://www.intel.com/design/intarch/datashts/29056201.pdf
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* - Date: April 1997
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* - Order Number: 290562-001
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*
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* - Name: 82371AB/EB/MB (PIIX4/PIIX4E/PIIX4M) Specification Update
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* - URL: http://www.intel.com/design/chipsets/specupdt/297738.htm
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* - PDF: http://www.intel.com/design/chipsets/specupdt/29773817.pdf
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* - Date: January 2002
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* - Order Number: 297738-017
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*/
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/* TODO: List the other datasheets. */
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#include <
device/device.h
>
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const
struct
chip_operations
southbridge_intel_i82371eb_ops
= {
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CHIP_NAME
(
"Intel 82371FB/SB/MX/AB/EB/MB Southbridge"
)
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};
southbridge_intel_i82371eb_ops
const struct chip_operations southbridge_intel_i82371eb_ops
Definition:
i82371eb.c:37
device.h
CHIP_NAME
#define CHIP_NAME(X)
Definition:
device.h:32
chip_operations
Definition:
device.h:23
src
southbridge
intel
i82371eb
i82371eb.c
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