coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
reset.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <arch/io.h>
4 #include <cf9_reset.h>
5 #include <reset.h>
6 #include <soc/southbridge.h>
7 #include <amdblocks/acpimmio.h>
8 #include <amdblocks/reset.h>
9 
10 void do_cold_reset(void)
11 {
12  /* De-assert and then assert all PwrGood signals on CF9 reset. */
16 }
17 
18 void do_warm_reset(void)
19 {
20  /* Assert reset signals only. */
22 }
23 
24 void do_board_reset(void)
25 {
26  /* TODO: Would a warm_reset() suffice? */
27  do_cold_reset();
28 }
static void pm_write16(uint8_t reg, uint16_t value)
Definition: acpimmio.h:186
static uint16_t pm_read16(uint8_t reg)
Definition: acpimmio.h:171
#define PWR_RESET_CFG
Definition: southbridge.h:13
#define TOGGLE_ALL_PWR_GOOD
Definition: southbridge.h:14
#define RST_CNT
Definition: cf9_reset.h:7
#define SYS_RST
Definition: cf9_reset.h:10
#define RST_CPU
Definition: cf9_reset.h:9
void outb(u8 val, u16 port)
void do_board_reset(void)
Definition: reset.c:8
void do_warm_reset(void)
Definition: reset.c:18
void do_cold_reset(void)
Definition: reset.c:10