coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
smihandler.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <baseboard/variants.h>
4 #include <cpu/x86/smm.h>
5 #include <delay.h>
8 #include <elog.h>
9 #include <gpio.h>
10 #include <intelblocks/smihandler.h>
11 #include <soc/pm.h>
12 #include <soc/gpio.h>
13 #include <variant/ec.h>
14 #include <variant/gpio.h>
15 
18  unsigned int delay_msecs;
19 };
20 
21 void mainboard_smi_gpi_handler(const struct gpi_status *sts)
22 {
23  if (gpi_status_get(sts, EC_SMI_GPI))
25 }
26 
27 void mainboard_smi_sleep(u8 slp_typ)
28 {
29  const struct pad_config *pads;
30  size_t num;
31 
32  pads = variant_sleep_gpio_table(&num, slp_typ);
33  gpio_configure_pads(pads, num);
34 
35  variant_smi_sleep(slp_typ);
36 
39 }
40 
42 {
45  return 0;
46 }
47 
49 {
51 }
52 
54 {
57 }
58 
60 {
61  /* Leave for the variant to implement if necessary. */
62 }
63 
65 {
66 
67  const struct gpio_with_delay lte_power_off_gpios[] = {
68  {
69  GPIO_161, /* AVS_I2S1_MCLK -- PLT_RST_LTE_L */
70  30,
71  },
72  {
73  GPIO_117, /* PCIE_WAKE1_B -- FULL_CARD_POWER_OFF */
74  100
75  },
76  {
77  GPIO_67, /* UART2-CTS_B -- EN_PP3300_DX_LTE_SOC */
78  0
79  }
80  };
81 
82  for (int i = 0; i < ARRAY_SIZE(lte_power_off_gpios); i++) {
83  gpio_output(lte_power_off_gpios[i].gpio, 0);
84  mdelay(lte_power_off_gpios[i].delay_msecs);
85  }
86 }
#define ARRAY_SIZE(a)
Definition: helpers.h:12
void __weak mainboard_smi_sleep(u8 slp_typ)
Definition: smihandler.c:210
int __weak mainboard_smi_apmc(u8 data)
Definition: smihandler.c:209
void mdelay(unsigned int msecs)
Definition: delay.c:2
void google_chromeec_log_events(uint64_t mask)
Definition: ec.c:386
void chromeec_smi_sleep(int slp_type, uint64_t s3_mask, uint64_t s5_mask)
Definition: smihandler.c:48
void chromeec_smi_process_events(void)
Definition: smihandler.c:29
void chromeec_smi_apmc(int apmc, uint64_t sci_mask, uint64_t smi_mask)
Definition: smihandler.c:89
#define GPIO_161
Definition: gpio_apl.h:282
void gpio_output(gpio_t gpio, int value)
Definition: gpio.c:194
#define MAINBOARD_EC_S5_WAKE_EVENTS
Definition: ec.h:32
#define MAINBOARD_EC_SCI_EVENTS
Definition: ec.h:12
#define MAINBOARD_EC_SMI_EVENTS
Definition: ec.h:28
#define EC_SMI_GPI
Definition: ec.h:10
#define MAINBOARD_EC_LOG_EVENTS
Definition: ec.h:42
#define MAINBOARD_EC_S3_WAKE_EVENTS
Definition: ec.h:37
void mainboard_smi_espi_handler(void)
Definition: smihandler.c:26
void elog_gsmi_cb_mainboard_log_wake_source(void)
Definition: smihandler.c:21
#define MAINBOARD_EC_S0IX_WAKE_EVENTS
Definition: ec.h:25
void mainboard_smi_gpi_handler(const struct gpi_status *sts)
Definition: smihandler.c:16
void __weak variant_smi_sleep(u8 slp_typ)
Definition: smihandler.c:52
const struct pad_config *__weak variant_sleep_gpio_table(size_t *num)
Definition: gpio.c:466
void power_off_lte_module(void)
Definition: smihandler.c:64
const struct smm_save_state_ops *legacy_ops __weak
Definition: save_state.c:8
#define GPIO_67
Definition: gpio.h:53
void gpio_configure_pads(const struct soc_amd_gpio *gpio_list_ptr, size_t size)
program a particular set of GPIO
Definition: gpio.c:307
#define GPIO_117
Definition: gpio.h:84
int gpi_status_get(const struct gpi_status *sts, gpio_t pad)
Definition: gpio.c:733
uint8_t u8
Definition: stdint.h:45
unsigned int delay_msecs
Definition: smihandler.c:18
Definition: pinmux.c:36