coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
soundwire.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <acpi/acpi_soundwire.h>
4 #include <console/console.h>
5 #include <device/mmio.h>
6 #include <device/soundwire.h>
8 #include <intelblocks/pmclib.h>
9 #include <stddef.h>
10 #include <string.h>
11 
12 static const struct soundwire_link link_xtal_38_4 = {
14  .clock_stop_mode1_supported = 1,
15  .clock_frequencies_supported_count = 1,
16  .clock_frequencies_supported = { 4800 * KHz },
17  .default_frame_rate = 48 * KHz,
18  .default_frame_row_size = 50,
19  .default_frame_col_size = 4,
20  .dynamic_frame_shape = 1,
21  .command_error_threshold = 16,
22 };
23 
24 static const struct soundwire_link link_xtal_24 = {
26  .clock_stop_mode1_supported = 1,
27  .clock_frequencies_supported_count = 1,
28  .clock_frequencies_supported = { 6 * MHz },
29  .default_frame_rate = 48 * KHz,
30  .default_frame_row_size = 125,
31  .default_frame_col_size = 2,
32  .dynamic_frame_shape = 1,
33  .command_error_threshold = 16,
34 };
35 
37  .acpi_address = 0x40000000,
38  .sdw = {
39  .master_list_count = 4
40  }
41 };
42 
44 {
45  const struct soundwire_link *link;
46  enum pch_pmc_xtal xtal = pmc_get_xtal_freq();
47  size_t i;
48 
49  /* Select link config based on XTAL frequency and set IP clock. */
50  switch (xtal) {
51  case XTAL_24_MHZ:
52  link = &link_xtal_24;
54  break;
55  case XTAL_38_4_MHZ:
56  link = &link_xtal_38_4;
57  intel_controller.ip_clock = 38400 * KHz;
58  break;
59  case XTAL_19_2_MHZ:
60  default:
61  printk(BIOS_ERR, "%s: XTAL not supported: 0x%x\n", __func__, xtal);
62  return -1;
63  }
64 
65  /* Fill link config in controller map based on selected XTAL. */
66  for (i = 0; i < intel_controller.sdw.master_list_count; i++)
67  memcpy(&intel_controller.sdw.master_list[i], link, sizeof(*link));
68 
69  *controller = &intel_controller;
70  return 0;
71 }
void * memcpy(void *dest, const void *src, size_t n)
Definition: memcpy.c:7
#define MHz
Definition: helpers.h:80
#define KHz
Definition: helpers.h:79
#define printk(level,...)
Definition: stdlib.h:16
__weak int soc_fill_soundwire_controller(struct intel_soundwire_controller **controller)
soc_fill_soundwire_controller() - Get SoundWire controller properties from the SoC.
Definition: soundwire.c:15
#define BIOS_ERR
BIOS_ERR - System in incomplete state.
Definition: loglevel.h:72
static struct intel_soundwire_controller intel_controller
Definition: soundwire.c:36
static const struct soundwire_link link_xtal_24
Definition: soundwire.c:24
static const struct soundwire_link link_xtal_38_4
Definition: soundwire.c:12
enum pch_pmc_xtal pmc_get_xtal_freq(void)
Definition: pmclib.c:761
pch_pmc_xtal
enum pch_pmc_xtal - External crystal oscillator frequency.
Definition: pmclib.h:18
@ XTAL_24_MHZ
Definition: pmclib.h:19
@ XTAL_38_4_MHZ
Definition: pmclib.h:21
@ XTAL_19_2_MHZ
Definition: pmclib.h:20
struct intel_soundwire_controller - SoundWire controller configuration for Intel SoC.
Definition: soundwire.h:28
struct soundwire_controller sdw
Definition: soundwire.h:33
struct soundwire_link master_list[SOUNDWIRE_MAX_LINK]
Definition: soundwire.h:129
unsigned int master_list_count
Definition: soundwire.h:128