coreboot
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lpc47n227.h
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef SUPERIO_SMSC_LPC47N227_LPC47N227_H
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#define SUPERIO_SMSC_LPC47N227_LPC47N227_H
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#include <
device/pnp_type.h
>
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/*
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* Since the LPC47N227 does not have logical devices but a flat configuration
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* space, these are arbitrary, but must match declarations in the mainboard
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* devicetree.cb.
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*/
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#define LPC47N227_PP 1
/* Parallel Port */
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#define LPC47N227_SP1 2
/* COM1 */
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#define LPC47N227_SP2 3
/* COM2 */
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#define LPC47N227_KBDC 5
/* Keyboard */
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#define LPC47N227_MAX_CONFIG_REGISTER 0x39
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void
pnp_enter_conf_state
(
pnp_devfn_t
dev);
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void
pnp_exit_conf_state
(
pnp_devfn_t
dev);
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void
lpc47n227_enable_serial
(
pnp_devfn_t
dev,
u16
iobase);
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#endif
pnp_exit_conf_state
void pnp_exit_conf_state(pnp_devfn_t dev)
Definition:
early_serial.c:38
pnp_enter_conf_state
void pnp_enter_conf_state(pnp_devfn_t dev)
Definition:
early_serial.c:30
lpc47n227_enable_serial
void lpc47n227_enable_serial(pnp_devfn_t dev, u16 iobase)
Configure the base I/O port of the specified serial device and enable the serial device.
Definition:
early_serial.c:99
pnp_type.h
pnp_devfn_t
u32 pnp_devfn_t
Definition:
pnp_type.h:8
u16
uint16_t u16
Definition:
stdint.h:48
src
superio
smsc
lpc47n227
lpc47n227.h
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