coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
gspi.c
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* This file is created based on Intel Alder Lake Processor PCH Datasheet
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* Document number: 621483
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* Chapter number: 11
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*/
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#include <
intelblocks/gspi.h
>
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#include <soc/pci_devs.h>
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int
gspi_soc_bus_to_devfn
(
unsigned
int
gspi_bus)
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{
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switch
(gspi_bus) {
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case
0:
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return
PCH_DEVFN_GSPI0
;
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case
1:
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return
PCH_DEVFN_GSPI1
;
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case
2:
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return
PCH_DEVFN_GSPI2
;
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case
3:
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return
PCH_DEVFN_GSPI3
;
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}
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return
-1;
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}
gspi_soc_bus_to_devfn
int gspi_soc_bus_to_devfn(unsigned int gspi_bus)
Definition:
gspi.c:12
gspi.h
PCH_DEVFN_GSPI0
#define PCH_DEVFN_GSPI0
Definition:
pci_devs.h:206
PCH_DEVFN_GSPI3
#define PCH_DEVFN_GSPI3
Definition:
pci_devs.h:114
PCH_DEVFN_GSPI2
#define PCH_DEVFN_GSPI2
Definition:
pci_devs.h:107
PCH_DEVFN_GSPI1
#define PCH_DEVFN_GSPI1
Definition:
pci_devs.h:207
src
soc
intel
alderlake
gspi.c
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