coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
lpc.h
Go to the documentation of this file.
1
/* SPDX-License-Identifier: GPL-2.0-only */
2
3
#ifndef _BAYTRAIL_LPC_H_
4
#define _BAYTRAIL_LPC_H_
5
6
/* PCI config registers in LPC bridge. */
7
#define REVID 0x08
8
#define ABASE 0x40
9
#define PBASE 0x44
10
#define GBASE 0x48
11
#define IOBASE 0x4c
12
#define IBASE 0x50
13
#define SBASE 0x54
14
#define MPBASE 0x58
15
#define PUBASE 0x5c
16
#define UART_CONT 0x80
17
#define RCBA 0xf0
18
19
#define RID_A_STEPPING_START 1
20
#define RID_B_STEPPING_START 5
21
#define RID_C_STEPPING_START 0xe
22
#define RID_D_STEPPING_START 0x11
23
24
enum
baytrail_stepping
{
25
STEP_A0
,
26
STEP_A1
,
27
STEP_B0
,
28
STEP_B1
,
29
STEP_B2
,
30
STEP_B3
,
31
STEP_C0
,
32
STEP_D0
,
33
};
34
35
/* Registers behind the RCBA_BASE_ADDRESS bar. */
36
#define GCS 0x00
37
# define BILD (1 << 0)
38
39
#endif
/* _BAYTRAIL_LPC_H_ */
baytrail_stepping
baytrail_stepping
Definition:
lpc.h:24
STEP_D0
@ STEP_D0
Definition:
lpc.h:32
STEP_A1
@ STEP_A1
Definition:
lpc.h:26
STEP_B1
@ STEP_B1
Definition:
lpc.h:28
STEP_B3
@ STEP_B3
Definition:
lpc.h:30
STEP_A0
@ STEP_A0
Definition:
lpc.h:25
STEP_B2
@ STEP_B2
Definition:
lpc.h:29
STEP_B0
@ STEP_B0
Definition:
lpc.h:27
STEP_C0
@ STEP_C0
Definition:
lpc.h:31
src
soc
intel
baytrail
include
soc
lpc.h
Generated by
1.9.1