coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
soc.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <console/console.h>
4 #include <device/device.h>
5 #include <symbols.h>
6 #include <soc/ipq_uart.h>
7 
8 #define RESERVED_SIZE_KB (0x01500000 / KiB)
9 
10 static void soc_read_resources(struct device *dev)
11 {
12  /* Reserve bottom 0x150_0000 bytes for NSS, SMEM, etc. */
15  (CONFIG_DRAM_SIZE_MB * KiB) - RESERVED_SIZE_KB);
16 }
17 
18 static void soc_init(struct device *dev)
19 {
20  /*
21  * Do this in case console is not enabled: kernel's earlyprintk()
22  * should work no matter what the firmware console configuration is.
23  */
25 
26  printk(BIOS_INFO, "CPU: Qualcomm 8064\n");
27 }
28 
29 static struct device_operations soc_ops = {
31  .init = soc_init,
32 };
33 
34 static void enable_soc_dev(struct device *dev)
35 {
36  dev->ops = &soc_ops;
37 }
38 
40  CHIP_NAME("SOC Qualcomm 8064")
41  .enable_dev = enable_soc_dev,
42 };
#define KiB
Definition: helpers.h:75
#define printk(level,...)
Definition: stdlib.h:16
#define CHIP_NAME(X)
Definition: device.h:32
#define ram_resource(dev, idx, basek, sizek)
Definition: device.h:321
#define reserved_ram_resource(dev, idx, basek, sizek)
Definition: device.h:324
u8 _dram[]
void ipq806x_uart_init(void)
Definition: uart.c:303
#define BIOS_INFO
BIOS_INFO - Expected events.
Definition: loglevel.h:113
static void enable_soc_dev(struct device *dev)
Definition: soc.c:34
#define RESERVED_SIZE_KB
Definition: soc.c:8
static void soc_read_resources(struct device *dev)
Definition: soc.c:10
struct chip_operations soc_qualcomm_ipq806x_ops
Definition: soc.c:39
static struct device_operations soc_ops
Definition: soc.c:29
static void soc_init(struct device *dev)
Definition: soc.c:18
unsigned long uintptr_t
Definition: stdint.h:21
void(* read_resources)(struct device *dev)
Definition: device.h:39
Definition: device.h:107
struct device_operations * ops
Definition: device.h:143