coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
chip.h
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef _NB_AGESA_CHIP_H_
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#define _NB_AGESA_CHIP_H_
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struct
northbridge_amd_agesa_family14_config
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{
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/*
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* Here is an example of how this would be put into the devicetree.cb file
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* Note that only Socket 0, Channel 0 is used for the Ontario
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* (family 14, Fam 0x00-0x0F) parts.
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* This should be placed after the device pci 18.x statements
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*
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* register "spdAddrLookup" = "
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* { // Use 8-bit SPD addresses here
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* { {0xA0, 0xA2}, {0x00, 0x00}, }, // socket 0 - Channel 0 & 1
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* { {0x00, 0x00}, {0x00, 0x00}, }, // socket 1 - Channel 0 & 1 (Unused)
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* }"
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*
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*/
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u8
spdAddrLookup
[2][2][4];
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};
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#endif
u8
uint8_t u8
Definition:
stdint.h:45
northbridge_amd_agesa_family14_config
Definition:
chip.h:7
northbridge_amd_agesa_family14_config::spdAddrLookup
u8 spdAddrLookup[2][2][4]
Definition:
chip.h:22
src
northbridge
amd
agesa
family14
chip.h
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