coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
memory.c
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <baseboard/variants.h>
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#include <baseboard/gpio.h>
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#include <gpio.h>
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#include <soc/meminit.h>
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#include <soc/romstage.h>
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static
const
struct
mb_cfg
board_memcfg_cfg
= {
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.
dq_map
[
DDR_CH0
] = {
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{0xf, 0xf0},
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{0xf, 0xf0},
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{0xff, 0x0},
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{0x0, 0x0},
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{0x0, 0x0},
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{0x0, 0x0}
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},
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.dq_map[
DDR_CH1
] = {
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{0xf, 0xf0},
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{0xf, 0xf0},
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{0xff, 0x0},
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{0x0, 0x0},
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{0x00, 0x0},
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{0x00, 0x0}
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},
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/*
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* The dqs_map arrays map the ddr4 pins to the SoC pins
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* for both channels.
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*
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* the index = pin number on SoC
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* the value = pin number on LPDDR4 part
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*/
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.dqs_map[
DDR_CH0
] = {0, 3, 2, 1, 7, 5, 4, 6},
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.dqs_map[
DDR_CH1
] = {3, 1, 2, 0, 4, 7, 6, 5},
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/* Disable Early Command Training */
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.ect = 1,
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/* User Board Type */
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.UserBd =
BOARD_TYPE_MOBILE
,
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};
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const
struct
mb_cfg
*
variant_memcfg_config
(
void
)
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{
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return
&
board_memcfg_cfg
;
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}
DDR_CH0
@ DDR_CH0
Definition:
cnl_memcfg_init.h:23
DDR_CH1
@ DDR_CH1
Definition:
cnl_memcfg_init.h:24
variant_memcfg_config
const struct mb_cfg *__weak variant_memcfg_config(void)
Definition:
memory.c:46
board_memcfg_cfg
static const struct mb_cfg board_memcfg_cfg
Definition:
memory.c:9
BOARD_TYPE_MOBILE
@ BOARD_TYPE_MOBILE
Definition:
romstage.h:14
mb_cfg
Definition:
meminit.h:71
mb_cfg::dq_map
uint8_t dq_map[CONFIG_DATA_BUS_WIDTH]
Definition:
meminit.h:80
src
mainboard
google
dedede
variants
beadrix
memory.c
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