coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
ast_dram_tables.h
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 /*
4  * File taken from the Linux ast driver (v3.18.5)
5  * coreboot-specific includes added at top and/or contents modified
6  * as needed to function within the coreboot environment.
7  */
8 #ifndef AST_DRAM_TABLES_H
9 #define AST_DRAM_TABLES_H
10 
11 /* DRAM timing tables */
12 struct ast_dramstruct {
13  u16 index;
14  u32 data;
15 };
16 
17 static const struct ast_dramstruct ast2000_dram_table_data[] = {
18  { 0x0108, 0x00000000 },
19  { 0x0120, 0x00004a21 },
20  { 0xFF00, 0x00000043 },
21  { 0x0000, 0xFFFFFFFF },
22  { 0x0004, 0x00000089 },
23  { 0x0008, 0x22331353 },
24  { 0x000C, 0x0d07000b },
25  { 0x0010, 0x11113333 },
26  { 0x0020, 0x00110350 },
27  { 0x0028, 0x1e0828f0 },
28  { 0x0024, 0x00000001 },
29  { 0x001C, 0x00000000 },
30  { 0x0014, 0x00000003 },
31  { 0xFF00, 0x00000043 },
32  { 0x0018, 0x00000131 },
33  { 0x0014, 0x00000001 },
34  { 0xFF00, 0x00000043 },
35  { 0x0018, 0x00000031 },
36  { 0x0014, 0x00000001 },
37  { 0xFF00, 0x00000043 },
38  { 0x0028, 0x1e0828f1 },
39  { 0x0024, 0x00000003 },
40  { 0x002C, 0x1f0f28fb },
41  { 0x0030, 0xFFFFFE01 },
42  { 0xFFFF, 0xFFFFFFFF }
43 };
44 
45 static const struct ast_dramstruct ast1100_dram_table_data[] = {
46  { 0x2000, 0x1688a8a8 },
47  { 0x2020, 0x000041f0 },
48  { 0xFF00, 0x00000043 },
49  { 0x0000, 0xfc600309 },
50  { 0x006C, 0x00909090 },
51  { 0x0064, 0x00050000 },
52  { 0x0004, 0x00000585 },
53  { 0x0008, 0x0011030f },
54  { 0x0010, 0x22201724 },
55  { 0x0018, 0x1e29011a },
56  { 0x0020, 0x00c82222 },
57  { 0x0014, 0x01001523 },
58  { 0x001C, 0x1024010d },
59  { 0x0024, 0x00cb2522 },
60  { 0x0038, 0xffffff82 },
61  { 0x003C, 0x00000000 },
62  { 0x0040, 0x00000000 },
63  { 0x0044, 0x00000000 },
64  { 0x0048, 0x00000000 },
65  { 0x004C, 0x00000000 },
66  { 0x0050, 0x00000000 },
67  { 0x0054, 0x00000000 },
68  { 0x0058, 0x00000000 },
69  { 0x005C, 0x00000000 },
70  { 0x0060, 0x032aa02a },
71  { 0x0064, 0x002d3000 },
72  { 0x0068, 0x00000000 },
73  { 0x0070, 0x00000000 },
74  { 0x0074, 0x00000000 },
75  { 0x0078, 0x00000000 },
76  { 0x007C, 0x00000000 },
77  { 0x0034, 0x00000001 },
78  { 0xFF00, 0x00000043 },
79  { 0x002C, 0x00000732 },
80  { 0x0030, 0x00000040 },
81  { 0x0028, 0x00000005 },
82  { 0x0028, 0x00000007 },
83  { 0x0028, 0x00000003 },
84  { 0x0028, 0x00000001 },
85  { 0x000C, 0x00005a08 },
86  { 0x002C, 0x00000632 },
87  { 0x0028, 0x00000001 },
88  { 0x0030, 0x000003c0 },
89  { 0x0028, 0x00000003 },
90  { 0x0030, 0x00000040 },
91  { 0x0028, 0x00000003 },
92  { 0x000C, 0x00005a21 },
93  { 0x0034, 0x00007c03 },
94  { 0x0120, 0x00004c41 },
95  { 0xffff, 0xffffffff },
96 };
97 
98 static const struct ast_dramstruct ast2100_dram_table_data[] = {
99  { 0x2000, 0x1688a8a8 },
100  { 0x2020, 0x00004120 },
101  { 0xFF00, 0x00000043 },
102  { 0x0000, 0xfc600309 },
103  { 0x006C, 0x00909090 },
104  { 0x0064, 0x00070000 },
105  { 0x0004, 0x00000489 },
106  { 0x0008, 0x0011030f },
107  { 0x0010, 0x32302926 },
108  { 0x0018, 0x274c0122 },
109  { 0x0020, 0x00ce2222 },
110  { 0x0014, 0x01001523 },
111  { 0x001C, 0x1024010d },
112  { 0x0024, 0x00cb2522 },
113  { 0x0038, 0xffffff82 },
114  { 0x003C, 0x00000000 },
115  { 0x0040, 0x00000000 },
116  { 0x0044, 0x00000000 },
117  { 0x0048, 0x00000000 },
118  { 0x004C, 0x00000000 },
119  { 0x0050, 0x00000000 },
120  { 0x0054, 0x00000000 },
121  { 0x0058, 0x00000000 },
122  { 0x005C, 0x00000000 },
123  { 0x0060, 0x0f2aa02a },
124  { 0x0064, 0x003f3005 },
125  { 0x0068, 0x02020202 },
126  { 0x0070, 0x00000000 },
127  { 0x0074, 0x00000000 },
128  { 0x0078, 0x00000000 },
129  { 0x007C, 0x00000000 },
130  { 0x0034, 0x00000001 },
131  { 0xFF00, 0x00000043 },
132  { 0x002C, 0x00000942 },
133  { 0x0030, 0x00000040 },
134  { 0x0028, 0x00000005 },
135  { 0x0028, 0x00000007 },
136  { 0x0028, 0x00000003 },
137  { 0x0028, 0x00000001 },
138  { 0x000C, 0x00005a08 },
139  { 0x002C, 0x00000842 },
140  { 0x0028, 0x00000001 },
141  { 0x0030, 0x000003c0 },
142  { 0x0028, 0x00000003 },
143  { 0x0030, 0x00000040 },
144  { 0x0028, 0x00000003 },
145  { 0x000C, 0x00005a21 },
146  { 0x0034, 0x00007c03 },
147  { 0x0120, 0x00005061 },
148  { 0xffff, 0xffffffff },
149 };
150 
151 /*
152  * AST2500 DRAM settings modules
153  */
154 #define REGTBL_NUM 17
155 #define REGIDX_010 0
156 #define REGIDX_014 1
157 #define REGIDX_018 2
158 #define REGIDX_020 3
159 #define REGIDX_024 4
160 #define REGIDX_02C 5
161 #define REGIDX_030 6
162 #define REGIDX_214 7
163 #define REGIDX_2E0 8
164 #define REGIDX_2E4 9
165 #define REGIDX_2E8 10
166 #define REGIDX_2EC 11
167 #define REGIDX_2F0 12
168 #define REGIDX_2F4 13
169 #define REGIDX_2F8 14
170 #define REGIDX_RFC 15
171 #define REGIDX_PLL 16
172 
173 static const u32 ast2500_ddr3_1600_timing_table[REGTBL_NUM] = {
174  0x64604D38, /* 0x010 */
175  0x29690599, /* 0x014 */
176  0x00000300, /* 0x018 */
177  0x00000000, /* 0x020 */
178  0x00000000, /* 0x024 */
179  0x02181E70, /* 0x02C */
180  0x00000040, /* 0x030 */
181  0x00000024, /* 0x214 */
182  0x02001300, /* 0x2E0 */
183  0x0E0000A0, /* 0x2E4 */
184  0x000E001B, /* 0x2E8 */
185  0x35B8C105, /* 0x2EC */
186  0x08090408, /* 0x2F0 */
187  0x9B000800, /* 0x2F4 */
188  0x0E400A00, /* 0x2F8 */
189  0x9971452F, /* tRFC */
190  0x000071C1 /* PLL */
191  };
192 
193  static const u32 ast2500_ddr4_1600_timing_table[REGTBL_NUM] = {
194  0x63604E37, /* 0x010 */
195  0xE97AFA99, /* 0x014 */
196  0x00019000, /* 0x018 */
197  0x08000000, /* 0x020 */
198  0x00000400, /* 0x024 */
199  0x00000410, /* 0x02C */
200  0x00000101, /* 0x030 */
201  0x00000024, /* 0x214 */
202  0x03002900, /* 0x2E0 */
203  0x0E0000A0, /* 0x2E4 */
204  0x000E001C, /* 0x2E8 */
205  0x35B8C106, /* 0x2EC */
206  0x08080607, /* 0x2F0 */
207  0x9B000900, /* 0x2F4 */
208  0x0E400A00, /* 0x2F8 */
209  0x99714545, /* tRFC */
210  0x000071C1 /* PLL */
211  };
212 
213 #endif
ast1100_dram_table_data
static const struct ast_dramstruct ast1100_dram_table_data[]
Definition: ast_dram_tables.h:45
REGTBL_NUM
#define REGTBL_NUM
Definition: ast_dram_tables.h:154
ast2500_ddr4_1600_timing_table
static const u32 ast2500_ddr4_1600_timing_table[REGTBL_NUM]
Definition: ast_dram_tables.h:193
ast2500_ddr3_1600_timing_table
static const u32 ast2500_ddr3_1600_timing_table[REGTBL_NUM]
Definition: ast_dram_tables.h:173
ast2000_dram_table_data
static const struct ast_dramstruct ast2000_dram_table_data[]
Definition: ast_dram_tables.h:17
ast2100_dram_table_data
static const struct ast_dramstruct ast2100_dram_table_data[]
Definition: ast_dram_tables.h:98
u32
uint32_t u32
Definition: stdint.h:51
u16
uint16_t u16
Definition: stdint.h:48
ast_dramstruct
Definition: ast_dram_tables.h:12
ast_dramstruct::data
u32 data
Definition: ast_dram_tables.h:14
ast_dramstruct::index
u16 index
Definition: ast_dram_tables.h:13