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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <baseboard/variants.h>
#include <chip.h>
#include <device/device.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <drivers/intel/gma/opregion.h>
#include <ec/google/chromeec/ec.h>
#include <fw_config.h>
#include <intelblocks/power_limit.h>
Go to the source code of this file.
Functions | |
const char * | mainboard_vbt_filename (void) |
void | variant_devtree_update (void) |
Variables | |
const struct cpu_power_limits | limits [] |
const struct system_power_limits | sys_limits [] |
const struct psys_config | psys_config |
const char* mainboard_vbt_filename | ( | void | ) |
Definition at line 35 of file ramstage.c.
References FW_CONFIG, and fw_config_probe().
Definition at line 44 of file ramstage.c.
References ARRAY_SIZE, limits, sys_limits, variant_update_power_limits(), and variant_update_psys_power_limits().
const struct cpu_power_limits limits[] |
Definition at line 1 of file ramstage.c.
const struct psys_config psys_config |
Definition at line 1 of file ramstage.c.
const struct system_power_limits sys_limits[] |
Definition at line 1 of file ramstage.c.