coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
ram_code.c
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <
device/mmio.h
>
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#include <soc/addressmap.h>
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#include <soc/sdram.h>
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#include <
soc/nvidia/tegra/apbmisc.h
>
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uint32_t
sdram_get_ram_code
(
void
)
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{
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struct
apbmisc
*
misc
= (
struct
apbmisc
*)
TEGRA_APB_MISC_BASE
;
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return
(
read32
(&
misc
->
pp_strapping_opt_a
) &
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PP_STRAPPING_OPT_A_RAM_CODE_MASK
) >>
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PP_STRAPPING_OPT_A_RAM_CODE_SHIFT
;
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}
misc
static struct apbmisc * misc
Definition:
apbmisc.c:8
apbmisc.h
PP_STRAPPING_OPT_A_RAM_CODE_MASK
@ PP_STRAPPING_OPT_A_RAM_CODE_MASK
Definition:
apbmisc.h:39
PP_STRAPPING_OPT_A_RAM_CODE_SHIFT
@ PP_STRAPPING_OPT_A_RAM_CODE_SHIFT
Definition:
apbmisc.h:38
read32
static uint32_t read32(const void *addr)
Definition:
mmio.h:22
mmio.h
sdram_get_ram_code
uint32_t sdram_get_ram_code(void)
Definition:
ram_code.c:8
TEGRA_APB_MISC_BASE
@ TEGRA_APB_MISC_BASE
Definition:
addressmap.h:26
uint32_t
unsigned int uint32_t
Definition:
stdint.h:14
apbmisc
Definition:
apbmisc.h:8
apbmisc::pp_strapping_opt_a
u32 pp_strapping_opt_a
Definition:
apbmisc.h:10
src
soc
nvidia
tegra210
ram_code.c
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