coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
hob_display.c
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1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 
3 #include <console/console.h>
4 #include <fsp/util.h>
5 #include <lib.h>
6 #include <assert.h>
7 #include <hob_iiouds.h>
8 #include <hob_memmap.h>
9 
10 static const uint8_t fsp_hob_iio_uds_guid[16] = FSP_HOB_IIO_UNIVERSAL_DATA_GUID;
11 static const uint8_t fsp_hob_memmap_guid[16] = FSP_SYSTEM_MEMORYMAP_HOB_GUID;
12 
13 struct guid_name_map {
14  const void *guid;
15  const char *name;
16 };
17 
18 static const struct guid_name_map guid_names[] = {
19  { fsp_hob_iio_uds_guid, "FSP_HOB_IIO_UNIVERSAL_DATA_GUID" },
20  { fsp_hob_memmap_guid, "FSP_SYSTEM_MEMORYMAP_HOB_GUID" },
21 };
22 
23 const char *soc_get_guid_name(const uint8_t *guid)
24 {
25  size_t index;
26 
27  /* Compare the GUID values in this module */
28  for (index = 0; index < ARRAY_SIZE(guid_names); index++)
29  if (fsp_guid_compare(guid, guid_names[index].guid))
30  return guid_names[index].name;
31 
32  return NULL;
33 }
34 
35 void soc_display_hob(const struct hob_header *hob)
36 {
37  const struct hob_resource *res;
38 
39  res = fsp_hob_header_to_resource(hob);
40  assert(res != NULL);
41  printk(BIOS_DEBUG, "\tResource type: 0x%x, attribute: 0x%x, addr: 0x%08llx, len: 0x%08llx\n",
42  res->type, res->attribute_type, res->addr, res->length);
43  printk(BIOS_DEBUG, "\tOwner GUID: ");
45  printk(BIOS_DEBUG, " (%s)\n", fsp_get_guid_name(res->owner_guid));
46 
49  else if (fsp_guid_compare(res->owner_guid, fsp_hob_memmap_guid) == 0)
51  else
52  hexdump(hob, hob->length);
53 }
54 
56 {
57  size_t hob_size = 0;
58  const struct SystemMemoryMapHob *hob =
60  assert(hob != NULL && hob_size != 0);
61 
62  printk(BIOS_DEBUG, "===================== MEMORY MAP HOB DATA =====================\n");
63  printk(BIOS_DEBUG, "hob: %p, hob_size: 0x%lx, SystemMemoryMapHob size: 0x%lx, "
64  "MAX_SOCKET: %d, SAD_RULES: %d\n",
65  hob, hob_size, sizeof(struct SystemMemoryMapHob), MAX_SOCKET, SAD_RULES);
66  printk(BIOS_DEBUG, "\tlowMemBase: 0x%x, lowMemSize: 0x%x, highMemBase: 0x%x, "
67  "highMemSize: 0x%x\n",
68  hob->lowMemBase, hob->lowMemSize, hob->highMemBase, hob->highMemSize);
69  printk(BIOS_DEBUG, "\tasilLoMemBase: 0x%x, asilHiMemBase: 0x%x, asilLoMemSize: 0x%x, "
70  "asilHiMemSize: 0x%x\n",
71  hob->lowMemBase, hob->lowMemSize, hob->highMemBase, hob->highMemSize);
72  printk(BIOS_DEBUG, "\tmemSize: 0x%x, memFreq: 0x%x, memMode: 0x%x, volMemMode: 0x%x, "
73  "DimmType: 0x%x, DramType: 0x%x\n",
74  hob->memSize, hob->memFreq, hob->memMode, hob->volMemMode,
75  hob->DimmType, hob->DramType);
76  printk(BIOS_DEBUG, "\tNumChPerMC: 0x%x, numberEntries: 0x%x, maxIMC: 0x%x, maxCh: 0x%x\n",
77  hob->NumChPerMC, hob->numberEntries, hob->maxIMC, hob->maxCh);
78 
79  printk(BIOS_DEBUG, "\tSystemMemoryMapElement Entries: %d\n", hob->numberEntries);
80  for (int e = 0; e < hob->numberEntries; ++e) {
81  const struct SystemMemoryMapElement *mem_element = &hob->Element[e];
82  printk(BIOS_DEBUG, "\t\tmemory_map %d BaseAddress: 0x%x, ElementSize: 0x%x, Type: 0x%x\n",
83  e, mem_element->BaseAddress,
84  mem_element->ElementSize, mem_element->Type);
85  }
86 }
87 
89 {
90  size_t hob_size = 0;
91  const IIO_UDS *hob = fsp_find_extension_hob_by_guid(fsp_hob_iio_uds_guid, &hob_size);
92 
93  assert(hob != NULL && hob_size != 0);
94 
95  printk(BIOS_DEBUG, "===================== IIO_UDS HOB DATA =====================\n");
96 
97  printk(BIOS_DEBUG, "\t===================== SYSTEM STATUS =====================\n");
98  printk(BIOS_DEBUG, "\tcpuType: 0x%x\n", hob->SystemStatus.cpuType);
99  printk(BIOS_DEBUG, "\tcpuSubType: 0x%x\n", hob->SystemStatus.cpuSubType);
100  printk(BIOS_DEBUG, "\tSystemRasType: 0x%x\n", hob->SystemStatus.SystemRasType);
101  printk(BIOS_DEBUG, "\tnumCpus: 0x%x\n", hob->SystemStatus.numCpus);
102  for (int x = 0; x < MAX_SOCKET; ++x) {
103  printk(BIOS_DEBUG, "\tSocket %d FusedCores: 0x%x, ActiveCores: 0x%x, "
104  "MaxCoreToBusRatio: 0x%x, MinCoreToBusRatio: 0x%x\n",
105  x, hob->SystemStatus.FusedCores[x], hob->SystemStatus.ActiveCores[x],
106  hob->SystemStatus.MaxCoreToBusRatio[x],
107  hob->SystemStatus.MinCoreToBusRatio[x]);
108  }
109  printk(BIOS_DEBUG, "\tCurrentCoreToBusRatio: 0x%x\n",
110  hob->SystemStatus.CurrentCoreToBusRatio);
111  printk(BIOS_DEBUG, "\tIntelSpeedSelectCapable: 0x%x\n",
112  hob->SystemStatus.IntelSpeedSelectCapable);
113  printk(BIOS_DEBUG, "\tIssConfigTdpLevelInfo: 0x%x\n",
114  hob->SystemStatus.IssConfigTdpLevelInfo);
115  for (int x = 0; x < TDP_MAX_LEVEL; ++x) {
116  printk(BIOS_DEBUG, "\t\tTDL Level %d IssConfigTdpTdpInfo: 0x%x, "
117  "IssConfigTdpPowerInfo: 0x%x, IssConfigTdpCoreCount: 0x%x\n",
118  x, hob->SystemStatus.IssConfigTdpTdpInfo[x],
119  hob->SystemStatus.IssConfigTdpPowerInfo[x],
120  hob->SystemStatus.IssConfigTdpCoreCount[x]);
121  }
122  printk(BIOS_DEBUG, "\tsocketPresentBitMap: 0x%x\n",
123  hob->SystemStatus.socketPresentBitMap);
124  printk(BIOS_DEBUG, "\ttolmLimit: 0x%x\n", hob->SystemStatus.tolmLimit);
125  printk(BIOS_DEBUG, "\ttohmLimit: 0x%x\n", hob->SystemStatus.tohmLimit);
126  printk(BIOS_DEBUG, "\tmmCfgBase: 0x%x\n", hob->SystemStatus.mmCfgBase);
127  printk(BIOS_DEBUG, "\tnumChPerMC: 0x%x\n", hob->SystemStatus.numChPerMC);
128  printk(BIOS_DEBUG, "\tmaxCh: 0x%x\n", hob->SystemStatus.maxCh);
129  printk(BIOS_DEBUG, "\tmaxIMC: 0x%x\n", hob->SystemStatus.maxIMC);
130 
131  printk(BIOS_DEBUG, "\t===================== PLATFORM DATA =====================\n");
132  printk(BIOS_DEBUG, "\tPlatGlobalIoBase: 0x%x\n", hob->PlatformData.PlatGlobalIoBase);
133  printk(BIOS_DEBUG, "\tPlatGlobalIoLimit: 0x%x\n", hob->PlatformData.PlatGlobalIoLimit);
134  printk(BIOS_DEBUG, "\tPlatGlobalMmiolBase: 0x%x\n",
135  hob->PlatformData.PlatGlobalMmiolBase);
136  printk(BIOS_DEBUG, "\tPlatGlobalMmiolLimit: 0x%x\n",
137  hob->PlatformData.PlatGlobalMmiolLimit);
138  printk(BIOS_DEBUG, "\tPlatGlobalMmiohBase: 0x%llx\n",
139  hob->PlatformData.PlatGlobalMmiohBase);
140  printk(BIOS_DEBUG, "\tPlatGlobalMmiohLimit: 0x%llx\n",
141  hob->PlatformData.PlatGlobalMmiohLimit);
142  printk(BIOS_DEBUG, "\tMemTsegSize: 0x%x\n", hob->PlatformData.MemTsegSize);
143  printk(BIOS_DEBUG, "\tMemIedSize: 0x%x\n", hob->PlatformData.MemIedSize);
144  printk(BIOS_DEBUG, "\tPciExpressBase: 0x%llx\n", hob->PlatformData.PciExpressBase);
145  printk(BIOS_DEBUG, "\tPciExpressSize: 0x%x\n", hob->PlatformData.PciExpressSize);
146  printk(BIOS_DEBUG, "\tMemTolm: 0x%x\n", hob->PlatformData.MemTolm);
147  printk(BIOS_DEBUG, "\tnumofIIO: 0x%x\n", hob->PlatformData.numofIIO);
148  printk(BIOS_DEBUG, "\tMaxBusNumber: 0x%x\n", hob->PlatformData.MaxBusNumber);
149  printk(BIOS_DEBUG, "\tIoGranularity: 0x%x\n", hob->PlatformData.IoGranularity);
150  printk(BIOS_DEBUG, "\tMmiolGranularity: 0x%x\n", hob->PlatformData.MmiolGranularity);
151  printk(BIOS_DEBUG, "\tMmiohGranularity: hi: 0x%x, lo:0x%x\n",
152  hob->PlatformData.MmiohGranularity.hi, hob->PlatformData.MmiohGranularity.lo);
153 
154  for (int s = 0; s < hob->PlatformData.numofIIO; ++s) {
155  printk(BIOS_DEBUG, "\t============ Socket %d Info ================\n", s);
156  printk(BIOS_DEBUG, "\tSocketID: 0x%x\n",
157  hob->PlatformData.IIO_resource[s].SocketID);
158  printk(BIOS_DEBUG, "\tBusBase: 0x%x\n",
159  hob->PlatformData.IIO_resource[s].BusBase);
160  printk(BIOS_DEBUG, "\tBusLimit: 0x%x\n",
161  hob->PlatformData.IIO_resource[s].BusLimit);
162  printk(BIOS_DEBUG, "\tPciResourceIoBase: 0x%x\n",
163  hob->PlatformData.IIO_resource[s].PciResourceIoBase);
164  printk(BIOS_DEBUG, "\tPciResourceIoLimit: 0x%x\n",
165  hob->PlatformData.IIO_resource[s].PciResourceIoLimit);
166  printk(BIOS_DEBUG, "\tIoApicBase: 0x%x\n",
167  hob->PlatformData.IIO_resource[s].IoApicBase);
168  printk(BIOS_DEBUG, "\tIoApicLimit: 0x%x\n",
169  hob->PlatformData.IIO_resource[s].IoApicLimit);
170  printk(BIOS_DEBUG, "\tPciResourceMem32Base: 0x%x\n",
171  hob->PlatformData.IIO_resource[s].PciResourceMem32Base);
172  printk(BIOS_DEBUG, "\tPciResourceMem32Limit: 0x%x\n",
173  hob->PlatformData.IIO_resource[s].PciResourceMem32Limit);
174  printk(BIOS_DEBUG, "\tPciResourceMem64Base: 0x%llx\n",
175  hob->PlatformData.IIO_resource[s].PciResourceMem64Base);
176  printk(BIOS_DEBUG, "\tPciResourceMem64Limit: 0x%llx\n",
177  hob->PlatformData.IIO_resource[s].PciResourceMem64Limit);
178 
179  printk(BIOS_DEBUG, "\t============ Stack Info ================\n");
180  for (int x = 0; x < MAX_IIO_STACK; ++x) {
181  const STACK_RES *ri = &hob->PlatformData.IIO_resource[s].StackRes[x];
182  printk(BIOS_DEBUG, "\t\t========== Stack %d ===============\n", x);
183  printk(BIOS_DEBUG, "\t\tBusBase: 0x%x\n", ri->BusBase);
184  printk(BIOS_DEBUG, "\t\tBusLimit: 0x%x\n", ri->BusLimit);
185  printk(BIOS_DEBUG, "\t\tPciResourceIoBase: 0x%x\n",
186  ri->PciResourceIoBase);
187  printk(BIOS_DEBUG, "\t\tPciResourceIoLimit: 0x%x\n",
188  ri->PciResourceIoLimit);
189  printk(BIOS_DEBUG, "\t\tIoApicBase: 0x%x\n", ri->IoApicBase);
190  printk(BIOS_DEBUG, "\t\tIoApicLimit: 0x%x\n", ri->IoApicLimit);
191  printk(BIOS_DEBUG, "\t\tPciResourceMem32Base: 0x%x\n",
192  ri->PciResourceMem32Base);
193  printk(BIOS_DEBUG, "\t\tPciResourceMem32Limit: 0x%x\n",
194  ri->PciResourceMem32Limit);
195  printk(BIOS_DEBUG, "\t\tPciResourceMem64Base: 0x%llx\n",
196  ri->PciResourceMem64Base);
197  printk(BIOS_DEBUG, "\t\tPciResourceMem64Limit: 0x%llx\n",
198  ri->PciResourceMem64Limit);
199  printk(BIOS_DEBUG, "\t\tVtdBarAddress: 0x%x\n", ri->VtdBarAddress);
200  }
201 
202  printk(BIOS_DEBUG, "\t============ PcieInfo ================\n");
203  IIO_RESOURCE_INSTANCE iio_resource =
204  hob->PlatformData.IIO_resource[s];
205  for (int p = 0; p < NUMBER_PORTS_PER_SOCKET; ++p) {
206  printk(BIOS_DEBUG, "\t\tPort: %d, Device: 0x%x, Function: 0x%x\n",
207  p, iio_resource.PcieInfo.PortInfo[p].Device,
208  iio_resource.PcieInfo.PortInfo[p].Function);
209  }
210  }
211 
212  printk(BIOS_DEBUG, "\t============ Bus Bases ===============\n");
213  for (int socket = 0; socket < MAX_SOCKET; ++socket) {
214  for (int stack = 0; stack < MAX_IIO_STACK; ++stack) {
215  printk(BIOS_DEBUG, "socket: %d, stack: %d, busno: 0x%x\n",
216  socket, stack,
217  hob->PlatformData.CpuQpiInfo[socket].StackBus[stack]);
218  }
219  }
220 }
const char * name
Definition: mmu.c:92
#define assert(statement)
Definition: assert.h:74
#define ARRAY_SIZE(a)
Definition: helpers.h:12
#define printk(level,...)
Definition: stdlib.h:16
__weak void soc_display_hob(const struct hob_header *hob)
Definition: hob_display.c:208
__weak const char * soc_get_guid_name(const uint8_t *guid)
Definition: hob_display.c:169
const char * fsp_get_guid_name(const uint8_t *guid)
Definition: hob_display.c:133
const void * fsp_find_extension_hob_by_guid(const uint8_t *guid, size_t *size)
void fsp_print_guid(const void *base)
const struct hob_resource * fsp_hob_header_to_resource(const struct hob_header *hob)
bool fsp_guid_compare(const uint8_t guid1[16], const uint8_t guid2[16])
int x
Definition: edid.c:994
void hexdump(const void *memory, size_t length)
Definition: hexdump.c:7
#define BIOS_DEBUG
BIOS_DEBUG - Verbose output.
Definition: loglevel.h:128
static const uint8_t fsp_hob_memmap_guid[16]
Definition: hob_display.c:11
static const uint8_t fsp_hob_iio_uds_guid[16]
Definition: hob_display.c:10
void soc_display_memmap_hob(void)
Definition: hob_display.c:55
static const struct guid_name_map guid_names[]
Definition: hob_display.c:18
void soc_display_iio_universal_data_hob(void)
Definition: hob_display.c:88
#define NULL
Definition: stddef.h:19
unsigned char uint8_t
Definition: stdint.h:8
const void * guid
Definition: hob_display.c:66
const char * name
Definition: hob_display.c:67
uint16_t length
Definition: util.h:28
uint32_t type
Definition: util.h:53
uint64_t length
Definition: util.h:56
uint32_t attribute_type
Definition: util.h:54
uint8_t owner_guid[16]
Definition: util.h:52
uint64_t addr
Definition: util.h:55
#define s(param, src_bits, pmcreg, dst_bits)