coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
max77686.c
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1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 
3 #include <console/console.h>
4 #include <device/mmio.h>
5 #include <device/i2c_simple.h>
6 
7 #include "max77686.h"
8 
9 /* Chip register numbers (not exported from this module) */
10 enum {
11  REG_BBAT = 0x7e,
12 
13  /* Bits for BBAT */
17 };
18 
19 /*
20  * Max77686 parameters values
21  * see max77686.h for parameters details
22  */
23 struct max77686_para max77686_param[] = {/*{vol_addr, vol_bitpos,
24  vol_bitmask, reg_enaddr, reg_enbitpos, reg_enbitmask, reg_enbiton,
25  reg_enbitoff, vol_min, vol_div}*/
26  {/* PMIC_BUCK1 */ 0x11, 0x0, 0x3F, 0x10, 0x0, 0x3, 0x3, 0x0, 750, 50000},
27  {/* PMIC_BUCK2 */ 0x14, 0x0, 0xFF, 0x12, 0x4, 0x3, 0x1, 0x0, 600, 12500},
28  {/* PMIC_BUCK3 */ 0x1E, 0x0, 0xFF, 0x1C, 0x4, 0x3, 0x1, 0x0, 600, 12500},
29  {/* PMIC_BUCK4 */ 0x28, 0x0, 0xFF, 0x26, 0x4, 0x3, 0x1, 0x0, 600, 12500},
30  {/* PMIC_BUCK5 */ 0x31, 0x0, 0x3F, 0x30, 0x0, 0x3, 0x3, 0x0, 750, 50000},
31  {/* PMIC_BUCK6 */ 0x33, 0x0, 0x3F, 0x32, 0x0, 0x3, 0x3, 0x0, 750, 50000},
32  {/* PMIC_BUCK7 */ 0x35, 0x0, 0x3F, 0x34, 0x0, 0x3, 0x3, 0x0, 750, 50000},
33  {/* PMIC_BUCK8 */ 0x37, 0x0, 0x3F, 0x36, 0x0, 0x3, 0x3, 0x0, 750, 50000},
34  {/* PMIC_BUCK9 */ 0x39, 0x0, 0x3F, 0x38, 0x0, 0x3, 0x3, 0x0, 750, 50000},
35  {/* PMIC_LDO1 */ 0x40, 0x0, 0x3F, 0x40, 0x6, 0x3, 0x3, 0x0, 800, 25000},
36  {/* PMIC_LDO2 */ 0x41, 0x0, 0x3F, 0x41, 0x6, 0x3, 0x1, 0x0, 800, 25000},
37  {/* PMIC_LDO3 */ 0x42, 0x0, 0x3F, 0x42, 0x6, 0x3, 0x3, 0x0, 800, 50000},
38  {/* PMIC_LDO4 */ 0x43, 0x0, 0x3F, 0x43, 0x6, 0x3, 0x3, 0x0, 800, 50000},
39  {/* PMIC_LDO5 */ 0x44, 0x0, 0x3F, 0x44, 0x6, 0x3, 0x3, 0x0, 800, 50000},
40  {/* PMIC_LDO6 */ 0x45, 0x0, 0x3F, 0x45, 0x6, 0x3, 0x1, 0x0, 800, 25000},
41  {/* PMIC_LDO7 */ 0x46, 0x0, 0x3F, 0x46, 0x6, 0x3, 0x1, 0x0, 800, 25000},
42  {/* PMIC_LDO8 */ 0x47, 0x0, 0x3F, 0x47, 0x6, 0x3, 0x1, 0x0, 800, 25000},
43  {/* PMIC_LDO9 */ 0x48, 0x0, 0x3F, 0x48, 0x6, 0x3, 0x3, 0x0, 800, 50000},
44  {/* PMIC_LDO10 */ 0x49, 0x0, 0x3F, 0x49, 0x6, 0x3, 0x1, 0x0, 800, 50000},
45  {/* PMIC_LDO11 */ 0x4A, 0x0, 0x3F, 0x4A, 0x6, 0x3, 0x1, 0x0, 800, 50000},
46  {/* PMIC_LDO12 */ 0x4B, 0x0, 0x3F, 0x4B, 0x6, 0x3, 0x1, 0x0, 800, 50000},
47  {/* PMIC_LDO13 */ 0x4C, 0x0, 0x3F, 0x4C, 0x6, 0x3, 0x3, 0x0, 800, 50000},
48  {/* PMIC_LDO14 */ 0x4D, 0x0, 0x3F, 0x4D, 0x6, 0x3, 0x1, 0x0, 800, 50000},
49  {/* PMIC_LDO15 */ 0x4E, 0x0, 0x3F, 0x4E, 0x6, 0x3, 0x1, 0x0, 800, 25000},
50  {/* PMIC_LDO16 */ 0x4F, 0x0, 0x3F, 0x4F, 0x6, 0x3, 0x1, 0x0, 800, 50000},
51  {/* PMIC_LDO17 */ 0x50, 0x0, 0x3F, 0x50, 0x6, 0x3, 0x3, 0x0, 800, 50000},
52  {/* PMIC_LDO18 */ 0x51, 0x0, 0x3F, 0x51, 0x6, 0x3, 0x3, 0x0, 800, 50000},
53  {/* PMIC_LDO19 */ 0x52, 0x0, 0x3F, 0x52, 0x6, 0x3, 0x3, 0x0, 800, 50000},
54  {/* PMIC_LDO20 */ 0x53, 0x0, 0x3F, 0x53, 0x6, 0x3, 0x3, 0x0, 800, 50000},
55  {/* PMIC_LDO21 */ 0x54, 0x0, 0x3F, 0x54, 0x6, 0x3, 0x3, 0x0, 800, 50000},
56  {/* PMIC_LDO22 */ 0x55, 0x0, 0x3F, 0x55, 0x6, 0x3, 0x3, 0x0, 800, 50000},
57  {/* PMIC_LDO23 */ 0x56, 0x0, 0x3F, 0x56, 0x6, 0x3, 0x3, 0x0, 800, 50000},
58  {/* PMIC_LDO24 */ 0x57, 0x0, 0x3F, 0x57, 0x6, 0x3, 0x3, 0x0, 800, 50000},
59  {/* PMIC_LDO25 */ 0x58, 0x0, 0x3F, 0x58, 0x6, 0x3, 0x3, 0x0, 800, 50000},
60  {/* PMIC_LDO26 */ 0x59, 0x0, 0x3F, 0x59, 0x6, 0x3, 0x3, 0x0, 800, 50000},
61  {/* PMIC_EN32KHZ_CP */ 0x0, 0x0, 0x0, 0x7F, 0x1, 0x1, 0x1, 0x0, 0x0, 0x0},
62 };
63 
64 /*
65  * Write a value to a register
66  *
67  * @param chip_addr i2c addr for max77686
68  * @param reg reg number to write
69  * @param val value to be written
70  *
71  */
72 static inline int max77686_i2c_write(unsigned int bus, unsigned char chip_addr,
73  unsigned int reg, unsigned char val)
74 {
75  return i2c_writeb(bus, chip_addr, reg, val);
76 }
77 
78 /*
79  * Read a value from a register
80  *
81  * @param chip_addr i2c addr for max77686
82  * @param reg reg number to write
83  * @param val value to be written
84  *
85  */
86 static inline int max77686_i2c_read(unsigned int bus, unsigned char chip_addr,
87  unsigned int reg, unsigned char *val)
88 {
89  return i2c_readb(bus, chip_addr, reg, (uint8_t *)val);
90 }
91 
92 /*
93  * Enable the max77686 register
94  *
95  * @param reg register number of buck/ldo to be enabled
96  * @param enable enable or disable bit
97  *
98  * REG_DISABLE = 0,
99  needed to set the buck/ldo enable bit OFF
100  * @return Return 0 if ok, else -1
101  */
102 static int max77686_enablereg(unsigned int bus, enum max77686_regnum reg, int enable)
103 {
104  struct max77686_para *pmic;
105  unsigned char read_data;
106  int ret;
107 
108  pmic = &max77686_param[reg];
109 
111  &read_data);
112  if (ret != 0) {
113  printk(BIOS_DEBUG, "max77686 i2c read failed.\n");
114  return -1;
115  }
116 
117  if (enable == REG_DISABLE) {
118  clrbits8(&read_data,
119  pmic->reg_enbitmask << pmic->reg_enbitpos);
120  } else {
121  clrsetbits8(&read_data,
122  pmic->reg_enbitmask << pmic->reg_enbitpos,
123  pmic->reg_enbiton << pmic->reg_enbitpos);
124  }
125 
127  pmic->reg_enaddr, read_data);
128  if (ret != 0) {
129  printk(BIOS_DEBUG, "max77686 i2c write failed.\n");
130  return -1;
131  }
132 
133  return 0;
134 }
135 
136 int max77686_volsetting(unsigned int bus, enum max77686_regnum reg,
137  unsigned int volt, int enable, int volt_units)
138 {
139  struct max77686_para *pmic;
140  unsigned char read_data;
141  int vol_level = 0;
142  int ret;
143 
144  pmic = &max77686_param[reg];
145 
146  if (pmic->vol_addr == 0) {
147  printk(BIOS_DEBUG, "not a voltage register.\n");
148  return -1;
149  }
150 
151  ret = max77686_i2c_read(bus, MAX77686_I2C_ADDR, pmic->vol_addr, &read_data);
152  if (ret != 0) {
153  printk(BIOS_DEBUG, "max77686 i2c read failed.\n");
154  return -1;
155  }
156 
157  if (volt_units == MAX77686_UV)
158  vol_level = volt - (u32)pmic->vol_min * 1000;
159  else
160  vol_level = (volt - (u32)pmic->vol_min) * 1000;
161 
162  if (vol_level < 0) {
163  printk(BIOS_DEBUG, "Not a valid voltage level to set\n");
164  return -1;
165  }
166  vol_level /= (u32)pmic->vol_div;
167 
168  clrsetbits8(&read_data, pmic->vol_bitmask << pmic->vol_bitpos,
169  vol_level << pmic->vol_bitpos);
170 
171  ret = max77686_i2c_write(bus, MAX77686_I2C_ADDR, pmic->vol_addr, read_data);
172  if (ret != 0) {
173  printk(BIOS_DEBUG, "max77686 i2c write failed.\n");
174  return -1;
175  }
176 
177  ret = max77686_enablereg(bus, reg, enable);
178  if (ret != 0) {
179  printk(BIOS_DEBUG, "Failed to enable buck/ldo.\n");
180  return -1;
181  }
182  return 0;
183 }
184 
185 int max77686_enable_32khz_cp(unsigned int bus)
186 {
188 }
189 
191 {
192  unsigned char val;
193  int ret;
194 
196  if (ret) {
197  printk(BIOS_DEBUG, "max77686 i2c read failed\n");
198  return ret;
199  }
200 
201  /* If we already have the correct values, exit */
204  return 0;
205 
206  /* First disable charging */
209  if (ret) {
210  printk(BIOS_DEBUG, "max77686 i2c write failed\n");
211  return -1;
212  }
213 
214  /* Finally select 3.5V to minimize power consumption */
215  val |= BBAT_BBCVS_MASK;
217  if (ret) {
218  printk(BIOS_DEBUG, "max77686 i2c write failed\n");
219  return -1;
220  }
221 
222  return 0;
223 }
#define printk(level,...)
Definition: stdlib.h:16
static int i2c_writeb(unsigned int bus, uint8_t slave, uint8_t reg, uint8_t data)
Write a byte with one segment in one frame.
Definition: i2c_simple.h:131
static int i2c_readb(unsigned int bus, uint8_t slave, uint8_t reg, uint8_t *data)
Read a byte with two segments in one frame.
Definition: i2c_simple.h:109
#define clrbits8(addr, clear)
Definition: mmio.h:24
#define clrsetbits8(addr, clear, set)
Definition: mmio.h:14
#define BIOS_DEBUG
BIOS_DEBUG - Verbose output.
Definition: loglevel.h:128
@ REG_BBAT
Definition: max77686.c:11
@ BBAT_BBCHOSTEN_MASK
Definition: max77686.c:14
@ BBAT_BBCVS_MASK
Definition: max77686.c:16
@ BBAT_BBCVS_SHIFT
Definition: max77686.c:15
static int max77686_i2c_write(unsigned int bus, unsigned char chip_addr, unsigned int reg, unsigned char val)
Definition: max77686.c:72
int max77686_volsetting(unsigned int bus, enum max77686_regnum reg, unsigned int volt, int enable, int volt_units)
Set the required voltage level of pmic.
Definition: max77686.c:136
int max77686_disable_backup_batt(unsigned int bus)
Disable charging of the RTC backup battery.
Definition: max77686.c:190
int max77686_enable_32khz_cp(unsigned int bus)
This function enables the 32KHz coprocessor clock.
Definition: max77686.c:185
static int max77686_enablereg(unsigned int bus, enum max77686_regnum reg, int enable)
Definition: max77686.c:102
static int max77686_i2c_read(unsigned int bus, unsigned char chip_addr, unsigned int reg, unsigned char *val)
Definition: max77686.c:86
struct max77686_para max77686_param[]
Definition: max77686.c:23
max77686_regnum
Definition: max77686.h:6
@ PMIC_EN32KHZ_CP
Definition: max77686.h:42
#define MAX77686_I2C_ADDR
Definition: max77686.h:72
@ MAX77686_UV
Definition: max77686.h:81
@ REG_ENABLE
Definition: max77686.h:76
@ REG_DISABLE
Definition: max77686.h:75
uint32_t u32
Definition: stdint.h:51
unsigned char uint8_t
Definition: stdint.h:8
Definition: device.h:76
struct max77686_para - max77686 register parameters
Definition: max77686.h:58
u8 reg_enbitpos
Definition: max77686.h:63
u8 reg_enbitmask
Definition: max77686.h:64
u8 vol_bitmask
Definition: max77686.h:61
u8 reg_enbiton
Definition: max77686.h:65
u8 val
Definition: sys.c:300