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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <acpi/acpi.h>
#include <baseboard/variants.h>
#include <ec/google/chromeec/ec.h>
#include <sar.h>
#include <soc/intel/apollolake/chip.h>
Go to the source code of this file.
Macros | |
#define | MIN_LTE_SKU 4 |
#define | FLEEX_MAX_SKU 0x20 |
Functions | |
static bool | is_lte_sku (void) |
void | variant_smi_sleep (u8 slp_typ) |
const char * | get_wifi_sar_cbfs_filename (void) |
void | variant_update_devtree (struct device *dev) |
const char* get_wifi_sar_cbfs_filename | ( | void | ) |
Definition at line 33 of file variant.c.
References is_lte_sku(), and WIFI_SAR_CBFS_DEFAULT_FILENAME.
Definition at line 12 of file variant.c.
References FLEEX_MAX_SKU, google_chromeec_get_board_sku(), MIN_LTE_SKU, and sku_id().
Referenced by get_wifi_sar_cbfs_filename(), variant_smi_sleep(), and variant_update_devtree().
Definition at line 23 of file variant.c.
References ACPI_S5, is_lte_sku(), and power_off_lte_module().
Definition at line 41 of file variant.c.
References device::chip_info, soc_intel_apollolake_config::disable_xhci_lfps_pm, is_lte_sku(), and NULL.