coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
uart.c
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* This file is created based on Intel Alder Lake Processor PCH Datasheet
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* Document number: 621483
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* Chapter number: 9
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*/
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#include <
commonlib/helpers.h
>
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#include <soc/pci_devs.h>
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const
unsigned
int
uart_devices
[] = {
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PCH_DEVFN_UART0
,
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PCH_DEVFN_UART1
,
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PCH_DEVFN_UART2
,
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};
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const
int
uart_devices_size
=
ARRAY_SIZE
(
uart_devices
);
ARRAY_SIZE
#define ARRAY_SIZE(a)
Definition:
helpers.h:12
helpers.h
PCH_DEVFN_UART0
#define PCH_DEVFN_UART0
Definition:
pci_devs.h:204
PCH_DEVFN_UART1
#define PCH_DEVFN_UART1
Definition:
pci_devs.h:205
PCH_DEVFN_UART2
#define PCH_DEVFN_UART2
Definition:
pci_devs.h:164
uart_devices_size
const int uart_devices_size
Definition:
uart.c:18
uart_devices
const unsigned int uart_devices[]
Definition:
uart.c:12
src
soc
intel
alderlake
uart.c
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