coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
boot.h File Reference
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Macros

#define RISCV_PAYLOAD_MODE_U   0
 
#define RISCV_PAYLOAD_MODE_S   1
 
#define RISCV_PAYLOAD_MODE_M   3
 

Functions

void run_payload (struct prog *prog, void *fdt, int payload_mode)
 
void run_payload_opensbi (struct prog *prog, void *fdt, struct prog *opensbi, int payload_mode)
 
void run_opensbi (const int hart_id, const void *opensbi, const void *fdt, const void *payload, const int payload_mode)
 

Macro Definition Documentation

◆ RISCV_PAYLOAD_MODE_M

#define RISCV_PAYLOAD_MODE_M   3

Definition at line 8 of file boot.h.

◆ RISCV_PAYLOAD_MODE_S

#define RISCV_PAYLOAD_MODE_S   1

Definition at line 7 of file boot.h.

◆ RISCV_PAYLOAD_MODE_U

#define RISCV_PAYLOAD_MODE_U   0

Definition at line 6 of file boot.h.

Function Documentation

◆ run_opensbi()

void run_opensbi ( const int  hart_id,
const void opensbi,
const void fdt,
const void payload,
const int  payload_mode 
)

Definition at line 7 of file opensbi.c.

References info.

Referenced by run_payload_opensbi().

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◆ run_payload()

void run_payload ( struct prog prog,
void fdt,
int  payload_mode 
)

Definition at line 34 of file payload.c.

References die(), INSERT_FIELD, MSTATUS_MPIE, MSTATUS_MPP, prog_entry(), PRV_M, PRV_S, PRV_U, RISCV_PAYLOAD_MODE_M, RISCV_PAYLOAD_MODE_S, RISCV_PAYLOAD_MODE_U, and void().

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◆ run_payload_opensbi()

void run_payload_opensbi ( struct prog prog,
void fdt,
struct prog opensbi,
int  payload_mode 
)

Definition at line 12 of file payload.c.

References INSERT_FIELD, MSTATUS_MPIE, MSTATUS_MPP, prog_entry(), PRV_M, and run_opensbi().

Referenced by do_arch_prog_run().

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