coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
spi.h
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #ifndef _SOC_SPI_H_
4 #define _SOC_SPI_H_
5 
6 #include <stdint.h>
7 
8 /* These registers live behind SPI_BASE_ADDRESS. */
9 #define HSFSTS 0x04
10 # define FLOCKDN (0x1 << 15)
11 #define LVSCC 0xc4
12 # define VCL (0x1 << 23)
13 # define EO(x) (((x) & 0xff) << 8)
14 # define WG_1_BYTE (0x0 << 2)
15 # define WG_64_BYTE (0x1 << 2)
16 # define BES_256_BYTE (0x0 << 0)
17 # define BES_4_KB (0x1 << 0)
18 # define BES_8_KB (0x2 << 0)
19 # define BES_64_KB (0x3 << 0)
20 #define UVSCC 0xc8
21 #define SCS 0xf8
22 # define SMIWPEN (0x1 << 7)
23 #define BCR 0xfc
24 # define EISS (0x1 << 5)
25 # define SRC_MASK (0x3 << 2)
26 # define SRC_CACHE_NO_PREFETCH (0x0 << 2)
27 # define SRC_NO_CACHE_NO_PREFETCH (0x1 << 2)
28 # define SRC_CACHE_PREFETCH (0x2 << 2)
29 # define BCR_LE (0x1 << 1)
30 # define BCR_WPD (0x1 << 0)
31 
32 /*
33  * SPI VSCC configuration.
34  */
35 struct vscc_config {
38 };
39 
40 /* Return 0 on success < 0 on failure. */
42 
43 #endif /* _SOC_SPI_H_ */
int mainboard_get_spi_vscc_config(struct vscc_config *cfg)
Definition: w25q64.c:16
unsigned int uint32_t
Definition: stdint.h:14
uint32_t lvscc
Definition: spi.h:36
uint32_t uvscc
Definition: spi.h:37