coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
superio.c
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1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 
3 #include <device/device.h>
4 #include <device/pnp.h>
5 #include <superio/conf_mode.h>
6 #include <pc80/keyboard.h>
7 #include "f81803a.h"
8 
9 static void f81803a_pme_init(struct device *dev)
10 {
13  /* enable ERP function*/
14  /* also set PSIN to generate PSOUT*/
16  pnp_exit_conf_mode(dev);
17 }
18 
19 static void f81803a_init(struct device *dev)
20 {
21  if (!dev->enabled)
22  return;
23  switch (dev->path.pnp.device) {
24  /* TODO: Might potentially need code for GPIO or WDT. */
25  case F81803A_KBC:
27  break;
28  case F81803A_PME:
29  f81803a_pme_init(dev);
30  break;
31  }
32 
33 }
34 
35 static struct device_operations ops = {
37  .set_resources = pnp_set_resources,
38  .enable_resources = pnp_enable_resources,
39  .enable = pnp_alt_enable,
40  .init = f81803a_init,
41  .ops_pnp_mode = &pnp_conf_mode_8787_aa,
42 };
43 
44 static struct pnp_info pnp_dev_info[] = {
45  { &ops, F81803A_SP1, PNP_IO0 | PNP_IRQ0, 0x7f8, },
46  { &ops, F81803A_SP2, PNP_IO0 | PNP_IRQ0, 0x7f8, },
47  { &ops, F81803A_HWM, PNP_IO0 | PNP_IRQ0, 0xff8, },
48  { &ops, F81803A_KBC, PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, 0x07f8, },
49  { &ops, F81803A_GPIO, PNP_IO0 | PNP_IRQ0, 0x7f8, },
50  { &ops, F81803A_WDT, PNP_IO0, 0x7f8 },
51  { &ops, F81803A_PME, },
52 };
53 
54 static void enable_dev(struct device *dev)
55 {
57 }
58 
60  CHIP_NAME("Fintek F81803A Super I/O")
61  .enable_dev = enable_dev
62 };
#define ARRAY_SIZE(a)
Definition: helpers.h:12
const struct pnp_mode_ops pnp_conf_mode_8787_aa
Definition: conf_mode.c:202
#define ERP_ENABLE
Definition: f81803a.h:38
#define F81803A_SP1
Definition: f81803a.h:13
#define F81803A_WDT
Definition: f81803a.h:18
#define LDN_REG
Definition: f81803a.h:11
#define F81803A_SP2
Definition: f81803a.h:14
#define F81803A_PME
Definition: f81803a.h:19
#define ERP_PSOUT_EN
Definition: f81803a.h:40
#define F81803A_HWM
Definition: f81803a.h:15
#define F81803A_GPIO
Definition: f81803a.h:17
#define F81803A_KBC
Definition: f81803a.h:16
#define PME_ERP_ENABLE_REG
Definition: f81803a.h:37
struct chip_operations superio_fintek_f81803a_ops
Definition: superio.c:59
static void enable_dev(struct device *dev)
Definition: superio.c:54
static struct device_operations ops
Definition: superio.c:35
static struct pnp_info pnp_dev_info[]
Definition: superio.c:44
static void f81803a_pme_init(struct device *dev)
Definition: superio.c:9
static void f81803a_init(struct device *dev)
Definition: superio.c:19
#define CHIP_NAME(X)
Definition: device.h:32
uint8_t pc_keyboard_init(uint8_t probe_aux)
Definition: keyboard.c:229
#define NO_AUX_DEVICE
Definition: keyboard.h:6
#define PNP_IRQ1
Definition: pnp.h:48
#define PNP_IO0
Definition: pnp.h:42
#define PNP_IRQ0
Definition: pnp.h:47
void pnp_exit_conf_mode(struct device *dev)
Definition: pnp_device.c:17
void pnp_read_resources(struct device *dev)
Definition: pnp_device.c:114
void pnp_enable_devices(struct device *base_dev, struct device_operations *ops, unsigned int functions, struct pnp_info *info)
Definition: pnp_device.c:371
void pnp_set_resources(struct device *dev)
Definition: pnp_device.c:157
void pnp_alt_enable(struct device *dev)
Definition: pnp_device.c:191
void pnp_enter_conf_mode(struct device *dev)
Definition: pnp_device.c:11
void pnp_write_config(struct device *dev, u8 reg, u8 value)
Definition: pnp_device.c:38
void pnp_enable_resources(struct device *dev)
Definition: pnp_device.c:173
void(* read_resources)(struct device *dev)
Definition: device.h:39
struct pnp_path pnp
Definition: path.h:117
Definition: device.h:107
struct device_path path
Definition: device.h:115
unsigned int enabled
Definition: device.h:122
Definition: pnp.h:37
unsigned int device
Definition: path.h:59