coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
bootblock.c
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <
device/pnp_ops.h
>
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#include <
southbridge/intel/lynxpoint/pch.h
>
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#include <
superio/nuvoton/common/nuvoton.h
>
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#include <
superio/nuvoton/nct6779d/nct6779d.h
>
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#define GLOBAL_DEV PNP_DEV(0x4e, 0)
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#define SERIAL_DEV PNP_DEV(0x4e, NCT6779D_SP1)
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#define ACPI_DEV PNP_DEV(0x4e, NCT6779D_ACPI)
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void
mainboard_config_superio
(
void
)
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{
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nuvoton_pnp_enter_conf_state
(
GLOBAL_DEV
);
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/* Select SIO pin mux states */
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pnp_write_config
(
GLOBAL_DEV
, 0x1a, 0x30);
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pnp_write_config
(
GLOBAL_DEV
, 0x1b, 0x70);
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pnp_write_config
(
GLOBAL_DEV
, 0x1c, 0x08);
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pnp_write_config
(
GLOBAL_DEV
, 0x1d, 0x00);
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pnp_write_config
(
GLOBAL_DEV
, 0x22, 0xff);
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pnp_write_config
(
GLOBAL_DEV
, 0x24, 0x04);
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pnp_write_config
(
GLOBAL_DEV
, 0x2a, 0x08);
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pnp_write_config
(
GLOBAL_DEV
, 0x2c, 0x00);
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/* Enable keyboard wakeup, 3VSBSW# is not connected */
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pnp_set_logical_device
(
ACPI_DEV
);
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pnp_write_config
(
ACPI_DEV
, 0xe4, 0x08);
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nuvoton_pnp_exit_conf_state
(
GLOBAL_DEV
);
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nuvoton_enable_serial
(
SERIAL_DEV
, CONFIG_TTYS0_BASE);
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}
mainboard_config_superio
void mainboard_config_superio(void)
Definition:
bootblock.c:47
ACPI_DEV
#define ACPI_DEV
Definition:
bootblock.c:10
SERIAL_DEV
#define SERIAL_DEV
Definition:
bootblock.c:9
GLOBAL_DEV
#define GLOBAL_DEV
Definition:
bootblock.c:8
nct6779d.h
nuvoton_pnp_enter_conf_state
void nuvoton_pnp_enter_conf_state(pnp_devfn_t dev)
Definition:
early_serial.c:33
nuvoton_enable_serial
void nuvoton_enable_serial(pnp_devfn_t dev, u16 iobase)
Definition:
early_serial.c:48
nuvoton_pnp_exit_conf_state
void nuvoton_pnp_exit_conf_state(pnp_devfn_t dev)
Definition:
early_serial.c:41
nuvoton.h
pnp_set_logical_device
void pnp_set_logical_device(struct device *dev)
Definition:
pnp_device.c:59
pnp_write_config
void pnp_write_config(struct device *dev, u8 reg, u8 value)
Definition:
pnp_device.c:38
pnp_ops.h
pch.h
src
mainboard
msi
h81m-p33
bootblock.c
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