coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
addressmap.h
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef __SOC_MEDIATEK_MT8183_INCLUDE_SOC_ADDRESSMAP_H__
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#define __SOC_MEDIATEK_MT8183_INCLUDE_SOC_ADDRESSMAP_H__
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enum
{
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MCUCFG_BASE
= 0x0C530000,
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IO_PHYS
= 0x10000000,
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};
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enum
{
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CKSYS_BASE
=
IO_PHYS
,
13
INFRACFG_AO_BASE
=
IO_PHYS
+ 0x00001000,
14
GPIO_BASE
=
IO_PHYS
+ 0x00005000,
15
SPM_BASE
=
IO_PHYS
+ 0x00006000,
16
RGU_BASE
=
IO_PHYS
+ 0x00007000,
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GPT_BASE
=
IO_PHYS
+ 0x00008000,
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EINT_BASE
=
IO_PHYS
+ 0x0000B000,
19
APMIXED_BASE
=
IO_PHYS
+ 0x0000C000,
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PWRAP_BASE
=
IO_PHYS
+ 0x0000D000,
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EMI_BASE
=
IO_PHYS
+ 0x00219000,
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EMI_MPU_BASE
=
IO_PHYS
+ 0x00226000,
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DRAMC_CH_BASE
=
IO_PHYS
+ 0x00228000,
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SSPM_SRAM_BASE
=
IO_PHYS
+ 0x00400000,
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SSPM_CFG_BASE
=
IO_PHYS
+ 0x00440000,
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I2C_DMA_BASE
=
IO_PHYS
+ 0x01000080,
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AUXADC_BASE
=
IO_PHYS
+ 0x01001000,
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UART0_BASE
=
IO_PHYS
+ 0x01002000,
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I2C_BASE
=
IO_PHYS
+ 0x01005000,
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SPI0_BASE
=
IO_PHYS
+ 0x0100A000,
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SPI1_BASE
=
IO_PHYS
+ 0x01010000,
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SPI2_BASE
=
IO_PHYS
+ 0x01012000,
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SPI3_BASE
=
IO_PHYS
+ 0x01013000,
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SPI4_BASE
=
IO_PHYS
+ 0x01014000,
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SPI5_BASE
=
IO_PHYS
+ 0x01015000,
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SSUSB_MAC_BASE
=
IO_PHYS
+ 0x01200000,
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SSUSB_IPPC_BASE
=
IO_PHYS
+ 0x01203e00,
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IOCFG_RT_BASE
=
IO_PHYS
+ 0x01C50000,
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IOCFG_RM_BASE
=
IO_PHYS
+ 0x01D20000,
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IOCFG_RB_BASE
=
IO_PHYS
+ 0x01D30000,
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MIPITX_BASE
=
IO_PHYS
+ 0x01E50000,
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IOCFG_LB_BASE
=
IO_PHYS
+ 0x01E70000,
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IOCFG_LM_BASE
=
IO_PHYS
+ 0x01E80000,
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IOCFG_BL_BASE
=
IO_PHYS
+ 0x01E90000,
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EFUSEC_BASE
=
IO_PHYS
+ 0x01F10000,
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IOCFG_LT_BASE
=
IO_PHYS
+ 0x01F20000,
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IOCFG_TL_BASE
=
IO_PHYS
+ 0x01F30000,
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SSUSB_SIF_BASE
=
IO_PHYS
+ 0x01F40300,
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MMSYS_BASE
=
IO_PHYS
+ 0x04000000,
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DISP_OVL0_BASE
=
IO_PHYS
+ 0x04008000,
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DISP_OVL1_BASE
=
IO_PHYS
+ 0x04009000,
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DISP_OVL1_2L_BASE
=
IO_PHYS
+ 0x0400A000,
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DISP_RDMA0_BASE
=
IO_PHYS
+ 0x0400B000,
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DISP_RDMA1_BASE
=
IO_PHYS
+ 0x0400C000,
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DISP_COLOR0_BASE
=
IO_PHYS
+ 0x0400E000,
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DISP_CCORR0_BASE
=
IO_PHYS
+ 0x0400F000,
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DISP_AAL0_BASE
=
IO_PHYS
+ 0x04010000,
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DISP_GAMMA0_BASE
=
IO_PHYS
+ 0x04011000,
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DISP_DITHER0_BASE
=
IO_PHYS
+ 0x04012000,
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DSI0_BASE
=
IO_PHYS
+ 0x04014000,
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DISP_MUTEX_BASE
=
IO_PHYS
+ 0x04016000,
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SMI_LARB0
=
IO_PHYS
+ 0x04017000,
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SMI_BASE
=
IO_PHYS
+ 0x04019000,
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};
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#endif
EMI_BASE
@ EMI_BASE
Definition:
addressmap.h:28
RGU_BASE
@ RGU_BASE
Definition:
addressmap.h:20
MMSYS_BASE
@ MMSYS_BASE
Definition:
addressmap.h:44
INFRACFG_AO_BASE
@ INFRACFG_AO_BASE
Definition:
addressmap.h:15
I2C_DMA_BASE
@ I2C_DMA_BASE
Definition:
addressmap.h:39
SPM_BASE
@ SPM_BASE
Definition:
addressmap.h:19
DSI0_BASE
@ DSI0_BASE
Definition:
addressmap.h:54
APMIXED_BASE
@ APMIXED_BASE
Definition:
addressmap.h:30
UART0_BASE
@ UART0_BASE
Definition:
addressmap.h:36
EINT_BASE
@ EINT_BASE
Definition:
addressmap.h:22
DISP_RDMA1_BASE
@ DISP_RDMA1_BASE
Definition:
addressmap.h:48
MCUCFG_BASE
@ MCUCFG_BASE
Definition:
addressmap.h:27
DISP_COLOR0_BASE
@ DISP_COLOR0_BASE
Definition:
addressmap.h:50
SSUSB_MAC_BASE
@ SSUSB_MAC_BASE
Definition:
addressmap.h:41
DISP_OVL1_BASE
@ DISP_OVL1_BASE
Definition:
addressmap.h:46
DISP_RDMA0_BASE
@ DISP_RDMA0_BASE
Definition:
addressmap.h:47
GPIO_BASE
@ GPIO_BASE
Definition:
addressmap.h:18
CKSYS_BASE
@ CKSYS_BASE
Definition:
addressmap.h:14
DISP_MUTEX_BASE
@ DISP_MUTEX_BASE
Definition:
addressmap.h:56
GPT_BASE
@ GPT_BASE
Definition:
addressmap.h:21
SSUSB_IPPC_BASE
@ SSUSB_IPPC_BASE
Definition:
addressmap.h:42
SSUSB_SIF_BASE
@ SSUSB_SIF_BASE
Definition:
addressmap.h:43
I2C_BASE
@ I2C_BASE
Definition:
addressmap.h:38
DISP_OVL0_BASE
@ DISP_OVL0_BASE
Definition:
addressmap.h:45
IO_PHYS
@ IO_PHYS
Definition:
addressmap.h:10
IOCFG_LT_BASE
@ IOCFG_LT_BASE
Definition:
addressmap.h:46
DISP_AAL0_BASE
@ DISP_AAL0_BASE
Definition:
addressmap.h:57
SPI2_BASE
@ SPI2_BASE
Definition:
addressmap.h:32
IOCFG_LM_BASE
@ IOCFG_LM_BASE
Definition:
addressmap.h:43
PWRAP_BASE
@ PWRAP_BASE
Definition:
addressmap.h:20
AUXADC_BASE
@ AUXADC_BASE
Definition:
addressmap.h:27
EFUSEC_BASE
@ EFUSEC_BASE
Definition:
addressmap.h:45
SSPM_SRAM_BASE
@ SSPM_SRAM_BASE
Definition:
addressmap.h:24
DISP_GAMMA0_BASE
@ DISP_GAMMA0_BASE
Definition:
addressmap.h:58
SSPM_CFG_BASE
@ SSPM_CFG_BASE
Definition:
addressmap.h:25
MIPITX_BASE
@ MIPITX_BASE
Definition:
addressmap.h:41
SMI_BASE
@ SMI_BASE
Definition:
addressmap.h:63
SPI3_BASE
@ SPI3_BASE
Definition:
addressmap.h:33
IOCFG_RB_BASE
@ IOCFG_RB_BASE
Definition:
addressmap.h:40
IOCFG_TL_BASE
@ IOCFG_TL_BASE
Definition:
addressmap.h:47
SPI4_BASE
@ SPI4_BASE
Definition:
addressmap.h:34
IOCFG_BL_BASE
@ IOCFG_BL_BASE
Definition:
addressmap.h:44
DISP_CCORR0_BASE
@ DISP_CCORR0_BASE
Definition:
addressmap.h:56
SPI1_BASE
@ SPI1_BASE
Definition:
addressmap.h:31
SPI5_BASE
@ SPI5_BASE
Definition:
addressmap.h:35
EMI_MPU_BASE
@ EMI_MPU_BASE
Definition:
addressmap.h:22
DRAMC_CH_BASE
@ DRAMC_CH_BASE
Definition:
addressmap.h:23
DISP_DITHER0_BASE
@ DISP_DITHER0_BASE
Definition:
addressmap.h:59
IOCFG_RT_BASE
@ IOCFG_RT_BASE
Definition:
addressmap.h:38
DISP_OVL1_2L_BASE
@ DISP_OVL1_2L_BASE
Definition:
addressmap.h:52
SMI_LARB0
@ SMI_LARB0
Definition:
addressmap.h:62
SPI0_BASE
@ SPI0_BASE
Definition:
addressmap.h:30
IOCFG_RM_BASE
@ IOCFG_RM_BASE
Definition:
addressmap.h:39
IOCFG_LB_BASE
@ IOCFG_LB_BASE
Definition:
addressmap.h:42
src
soc
mediatek
mt8183
include
soc
addressmap.h
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