coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
smihandler.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <cpu/x86/smm.h>
6 #include <elog.h>
7 #include <gpio.h>
8 #include <soc/gpio.h>
10 
11 #include <baseboard/variants.h>
12 #include <variant/gpio.h>
13 #include <variant/ec.h>
14 
16 {
18 }
19 
20 void __weak variant_smi_sleep(u8 slp_typ) {}
21 
22 void mainboard_smi_sleep(u8 slp_typ)
23 {
24  const struct google_chromeec_event_info *info;
25 
27 
28  variant_smi_sleep(slp_typ);
29  chromeec_smi_sleep(slp_typ, info->s3_wake_events, info->s5_wake_events);
30 }
31 
33 {
34  const struct google_chromeec_event_info *info;
35 
37 
38  chromeec_smi_apmc(apmc, info->sci_events, info->smi_events);
39 
40  return 0;
41 }
42 
44 {
45  const struct google_chromeec_event_info *info;
46 
48 
49  google_chromeec_log_events(info->log_events | info->s0ix_wake_events);
50 }
void __weak mainboard_smi_sleep(u8 slp_typ)
Definition: smihandler.c:210
int __weak mainboard_smi_apmc(u8 data)
Definition: smihandler.c:209
static struct smmstore_params_info info
Definition: ramstage.c:12
void google_chromeec_log_events(uint64_t mask)
Definition: ec.c:386
void chromeec_smi_sleep(int slp_type, uint64_t s3_mask, uint64_t s5_mask)
Definition: smihandler.c:48
void chromeec_smi_process_events(void)
Definition: smihandler.c:29
void chromeec_smi_apmc(int apmc, uint64_t sci_mask, uint64_t smi_mask)
Definition: smihandler.c:89
void mainboard_smi_espi_handler(void)
Definition: smihandler.c:26
void elog_gsmi_cb_mainboard_log_wake_source(void)
Definition: smihandler.c:21
void __weak variant_smi_sleep(u8 slp_typ)
Definition: smihandler.c:52
__weak const struct google_chromeec_event_info * variant_get_event_info(void)
Definition: ec.c:9
const struct smm_save_state_ops *legacy_ops __weak
Definition: save_state.c:8
uint8_t u8
Definition: stdint.h:45