coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <bootstate.h>
#include <cpu/x86/smm.h>
#include <commonlib/helpers.h>
#include <commonlib/region.h>
#include <console/console.h>
#include <smmstore.h>
#include <types.h>
#include <cbmem.h>
Go to the source code of this file.
Functions | |
void | lb_smmstorev2 (struct lb_header *header) |
static void | init_store (void *unused) |
BOOT_STATE_INIT_ENTRY (BS_DEV_INIT, BS_ON_EXIT, init_store, NULL) | |
Variables | |
static struct smmstore_params_info | info |
BOOT_STATE_INIT_ENTRY | ( | BS_DEV_INIT | , |
BS_ON_EXIT | , | ||
init_store | , | ||
NULL | |||
) |
Definition at line 37 of file ramstage.c.
References APM_CNT, APM_CNT_SMMSTORE, args, BIOS_ERR, BIOS_INFO, smmstore_params_info::block_size, cbmem_add(), CBMEM_ID_SMM_COMBUFFER, info, printk, SMMSTORE_CMD_INIT, and SMMSTORE_RET_SUCCESS.
void lb_smmstorev2 | ( | struct lb_header * | header | ) |
Definition at line 14 of file ramstage.c.
References lb_smmstorev2::apm_cmd, APM_CNT_SMMSTORE, lb_smmstorev2::block_size, smmstore_params_info::block_size, cbmem_entry_find(), cbmem_entry_size(), cbmem_entry_start(), CBMEM_ID_SMM_COMBUFFER, lb_smmstorev2::com_buffer, lb_smmstorev2::com_buffer_size, header, info, lb_new_record(), LB_TAG_SMMSTOREV2, lb_smmstorev2::mmap_addr, smmstore_params_info::mmap_addr, lb_smmstorev2::num_blocks, smmstore_params_info::num_blocks, lb_smmstorev2::size, and lb_smmstorev2::tag.
Referenced by write_coreboot_table().
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static |
Definition at line 1 of file ramstage.c.
Referenced by __gcov_init(), agesa_HaltThisAp(), agesa_ReadSpd(), agesa_ReadSpd_from_cbfs(), allocate_cpu_devices(), AmdMemoryReadSPD(), ap_init(), board_ReadSpd_from_cbfs(), boot_with_psp_timestamp(), calculate_timings(), check_cached_sanity(), check_cros_camera_info(), choose_reg178(), choose_training(), collect_system_info(), compute_274265(), compute_derived_timings(), config_rank(), configure_display(), conn_get_cbmem_buffer(), conn_write_cbmem_entry(), convert_ddr2_module_type_to_spd_info(), convert_ddr3_module_type_to_spd_info(), convert_ddr4_module_type_to_spd_info(), convert_ddr5_module_type_to_spd_info(), convert_default_module_type_to_spd_info(), convert_lpx_module_type_to_spd_info(), count_ranks_in_channel(), cpu_get_cache_level(), cpu_get_cache_line_size(), cpu_get_cache_phy_partition_info(), cpu_get_cache_sets(), cpu_get_cache_type(), cpu_get_cache_ways_assoc_info(), cpu_get_max_cache_share(), cpu_info(), cpu_initialize(), cpu_is_cache_full_assoc(), create_smbios_type17_for_dimm(), cycle_ps(), dbgp_control_msg(), dbgp_ehci_info(), do_bus_clear(), do_ram_training(), dram_all_config(), dram_dimm_mapping(), dump_timings(), dump_usbl_report(), early_quickpath_init(), elog_gsmi_cb_mainboard_log_wake_source(), fb_add_framebuffer_info(), fb_add_framebuffer_info_ex(), fb_set_orientation(), fill_cpu_cache_info(), find_stack_for_bus(), frequency_01(), frequency_11(), fsbcycle_ps(), generate_acpi_power_engine_with_lpm(), get_cache_size(), get_cur_temp(), get_iiostack_info(), get_io_address(), get_max_timing(), get_resources(), get_spd_info(), google_chromeec_events_init(), google_chromeec_flash_info(), google_chromeec_vstore_info(), gpio_get_driving(), gpio_set_driving(), halfcycle_ps(), have_match_ranks(), i82801ix_init(), i82801ix_pcie_init(), i82801jx_init(), i82801jx_pcie_init(), init_bsp(), init_store(), init_vpd_rdev(), initialize_cpus(), jedec_init(), jedec_read(), late_quickpath_init(), lb_smmstorev2(), link_ec_init(), mainboard_ec_init(), mainboard_print_spd_info(), mainboard_smi_apmc(), mainboard_smi_sleep(), mem_chip_info_size(), mp_initialize_cpu(), ns_to_cycles(), pep_s0ix_return_lpm_requirements(), pnp_enable_devices(), program_base_timings(), program_board_delay(), program_modules_memory_map(), program_timings(), program_total_memory_map(), ps_to_halfcycles(), quickpath_configure_pll_ratio(), ram_training(), raminit(), ramstage_ec_init(), read_4090(), read_500(), read_pmc_lpm_requirements(), read_spd_dimm(), read_spd_md(), replay_transfer_buffer_cbmemc(), report_cache_info(), rmw_500(), run_opensbi(), save_timings(), seq9(), set_10b(), set_2d5x_reg(), set_2dx8_reg(), set_2dxx_series(), set_4cf(), set_6d_reg(), show_psp_transfer_info(), smbios_write_type7_cache_parameters(), start_cpu(), tegra_i2c_send_recv(), tis_get_dev_name(), tis_init(), tmu_init(), tmu_setup_parameters(), tpm2_get_info(), train_ram_at_178(), try_cached_training(), try_timing_offsets(), txt_dump_acm_info(), usbdebug_init_(), validate_acm(), variant_get_event_info(), wilco_ec_get_info(), wilco_ec_print_all_info(), write_500(), write_500_timings_type(), write_training_data(), and x86_exception().