coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
device_nvs.h
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef _BAYTRAIL_DEVICE_NVS_H_
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#define _BAYTRAIL_DEVICE_NVS_H_
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#include <
stdint.h
>
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#define LPSS_NVS_SIO_DMA1 0
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#define LPSS_NVS_I2C1 1
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#define LPSS_NVS_I2C2 2
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#define LPSS_NVS_I2C3 3
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#define LPSS_NVS_I2C4 4
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#define LPSS_NVS_I2C5 5
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#define LPSS_NVS_I2C6 6
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#define LPSS_NVS_I2C7 7
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#define LPSS_NVS_SIO_DMA2 8
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#define LPSS_NVS_SPI 9
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#define LPSS_NVS_PWM1 10
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#define LPSS_NVS_PWM2 11
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#define LPSS_NVS_HSUART1 12
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#define LPSS_NVS_HSUART2 13
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#define SCC_NVS_MMC 0
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#define SCC_NVS_SDIO 1
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#define SCC_NVS_SD 2
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struct
__packed
device_nvs
{
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/* Device Enabled in ACPI Mode */
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u8
lpss_en[14];
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u8
scc_en[3];
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u8
lpe_en
;
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/* BAR 0 */
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u32
lpss_bar0[14];
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u32
scc_bar0[3];
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u32
lpe_bar0
;
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/* BAR 1 */
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u32
lpss_bar1[14];
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u32
scc_bar1[3];
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u32
lpe_bar1
;
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/* Extra */
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u32
lpe_fw
;
/* LPE Firmware */
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};
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#endif
stdint.h
u32
uint32_t u32
Definition:
stdint.h:51
u8
uint8_t u8
Definition:
stdint.h:45
__packed
Definition:
x86.c:23
device_nvs
Definition:
device_nvs.h:27
device_nvs::lpe_bar1
u32 lpe_bar1
Definition:
device_nvs.h:41
device_nvs::lpe_bar0
u32 lpe_bar0
Definition:
device_nvs.h:36
device_nvs::lpe_fw
u32 lpe_fw
Definition:
device_nvs.h:44
device_nvs::lpe_en
u8 lpe_en
Definition:
device_nvs.h:31
src
soc
intel
baytrail
include
soc
device_nvs.h
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