coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
spi_reg_delay1 Union Reference

#include <spi_internal.h>

Collaboration diagram for spi_reg_delay1:
Collaboration graph

Data Fields

struct {
   uint32_t   intercs: 8
 
   uint32_t   reserved0: 8
 
   uint32_t   interxfr: 8
 
   uint32_t   reserved1: 8
 
}; 
 
uint32_t raw_bits
 

Detailed Description

Definition at line 45 of file spi_internal.h.

Field Documentation

◆ 

struct { ... }

◆ intercs

uint32_t spi_reg_delay1::intercs

Definition at line 47 of file spi_internal.h.

◆ interxfr

uint32_t spi_reg_delay1::interxfr

Definition at line 49 of file spi_internal.h.

◆ raw_bits

uint32_t spi_reg_delay1::raw_bits

Definition at line 52 of file spi_internal.h.

◆ reserved0

uint32_t spi_reg_delay1::reserved0

Definition at line 48 of file spi_internal.h.

◆ reserved1

uint32_t spi_reg_delay1::reserved1

Definition at line 50 of file spi_internal.h.


The documentation for this union was generated from the following file: