coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
soc_intel_braswell_config Struct Reference

#include <chip.h>

Collaboration diagram for soc_intel_braswell_config:
Collaboration graph

Data Fields

bool enable_xdp_tap
 
bool dptf_enable
 
enum serirq_mode serirq_mode
 
bool disable_slp_x_stretch_sus_fail
 
enum lpe_clk_src lpe_codec_clk_src
 
uint32_t sdcard_cap_low
 
uint32_t sdcard_cap_high
 
bool lpss_acpi_mode
 
bool emmc_acpi_mode
 
bool sd_acpi_mode
 
bool lpe_acpi_mode
 
bool pcie_wake_enable
 
enum usb_comp_bg_value usb_comp_bg
 
uint8_t PcdMrcInitSpdAddr1
 
uint8_t PcdMrcInitSpdAddr2
 
uint8_t PcdIgdDvmt50PreAlloc
 
uint8_t PcdDvfsEnable
 
uint8_t PcdCaMirrorEn
 
uint8_t PcdSdcardMode
 
uint8_t PcdEnableHsuart0
 
uint8_t PcdEnableHsuart1
 
uint8_t PcdEnableAzalia
 
uint8_t PcdEnableSata
 
uint8_t PcdEnableXhci
 
uint8_t PcdEnableLpe
 
uint8_t PcdEnableDma0
 
uint8_t PcdEnableDma1
 
uint8_t PcdEnableI2C0
 
uint8_t PcdEnableI2C1
 
uint8_t PcdEnableI2C2
 
uint8_t PcdEnableI2C3
 
uint8_t PcdEnableI2C4
 
uint8_t PcdEnableI2C5
 
uint8_t PcdEnableI2C6
 
uint8_t PunitPwrConfigDisable
 
uint8_t ChvSvidConfig
 
uint8_t DptfDisable
 
uint8_t PcdEmmcMode
 
uint8_t Usb2Port0PerPortPeTxiSet
 
uint8_t Usb2Port0PerPortTxiSet
 
uint8_t Usb2Port0IUsbTxEmphasisEn
 
uint8_t Usb2Port0PerPortTxPeHalf
 
uint8_t Usb2Port1PerPortPeTxiSet
 
uint8_t Usb2Port1PerPortTxiSet
 
uint8_t Usb2Port1IUsbTxEmphasisEn
 
uint8_t Usb2Port1PerPortTxPeHalf
 
uint8_t Usb2Port2PerPortPeTxiSet
 
uint8_t Usb2Port2PerPortTxiSet
 
uint8_t Usb2Port2IUsbTxEmphasisEn
 
uint8_t Usb2Port2PerPortTxPeHalf
 
uint8_t Usb2Port3PerPortPeTxiSet
 
uint8_t Usb2Port3PerPortTxiSet
 
uint8_t Usb2Port3IUsbTxEmphasisEn
 
uint8_t Usb2Port3PerPortTxPeHalf
 
uint8_t Usb2Port4PerPortPeTxiSet
 
uint8_t Usb2Port4PerPortTxiSet
 
uint8_t Usb2Port4IUsbTxEmphasisEn
 
uint8_t Usb2Port4PerPortTxPeHalf
 
uint8_t Usb3Lane0Ow2tapgen2deemph3p5
 
uint8_t Usb3Lane1Ow2tapgen2deemph3p5
 
uint8_t Usb3Lane2Ow2tapgen2deemph3p5
 
uint8_t Usb3Lane3Ow2tapgen2deemph3p5
 
uint8_t PcdPchUsbSsicPort
 
uint8_t PcdPchUsbHsicPort
 
uint8_t PcdPchSsicEnable
 
uint8_t PMIC_I2CBus
 
uint8_t ISPEnable
 
uint8_t ISPPciDevConfig
 
uint8_t PcdSdDetectChk
 
uint8_t I2C0Frequency
 
uint8_t I2C1Frequency
 
uint8_t I2C2Frequency
 
uint8_t I2C3Frequency
 
uint8_t I2C4Frequency
 
uint8_t I2C5Frequency
 
uint8_t I2C6Frequency
 
struct i915_gpu_controller_info gfx
 

Detailed Description

Definition at line 42 of file chip.h.

Field Documentation

◆ ChvSvidConfig

uint8_t soc_intel_braswell_config::ChvSvidConfig

Definition at line 106 of file chip.h.

◆ disable_slp_x_stretch_sus_fail

bool soc_intel_braswell_config::disable_slp_x_stretch_sus_fail

Definition at line 50 of file chip.h.

◆ dptf_enable

bool soc_intel_braswell_config::dptf_enable

Definition at line 45 of file chip.h.

◆ DptfDisable

uint8_t soc_intel_braswell_config::DptfDisable

Definition at line 107 of file chip.h.

◆ emmc_acpi_mode

bool soc_intel_braswell_config::emmc_acpi_mode

Definition at line 61 of file chip.h.

◆ enable_xdp_tap

bool soc_intel_braswell_config::enable_xdp_tap

Definition at line 43 of file chip.h.

◆ gfx

struct i915_gpu_controller_info soc_intel_braswell_config::gfx

Definition at line 146 of file chip.h.

◆ I2C0Frequency

uint8_t soc_intel_braswell_config::I2C0Frequency

Definition at line 140 of file chip.h.

◆ I2C1Frequency

uint8_t soc_intel_braswell_config::I2C1Frequency

Definition at line 141 of file chip.h.

◆ I2C2Frequency

uint8_t soc_intel_braswell_config::I2C2Frequency

Definition at line 142 of file chip.h.

◆ I2C3Frequency

uint8_t soc_intel_braswell_config::I2C3Frequency

Definition at line 143 of file chip.h.

◆ I2C4Frequency

uint8_t soc_intel_braswell_config::I2C4Frequency

Definition at line 144 of file chip.h.

◆ I2C5Frequency

uint8_t soc_intel_braswell_config::I2C5Frequency

Definition at line 145 of file chip.h.

◆ I2C6Frequency

uint8_t soc_intel_braswell_config::I2C6Frequency

Definition at line 146 of file chip.h.

◆ ISPEnable

uint8_t soc_intel_braswell_config::ISPEnable

Definition at line 137 of file chip.h.

◆ ISPPciDevConfig

uint8_t soc_intel_braswell_config::ISPPciDevConfig

Definition at line 138 of file chip.h.

◆ lpe_acpi_mode

bool soc_intel_braswell_config::lpe_acpi_mode

Definition at line 63 of file chip.h.

◆ lpe_codec_clk_src

enum lpe_clk_src soc_intel_braswell_config::lpe_codec_clk_src

Definition at line 50 of file chip.h.

◆ lpss_acpi_mode

bool soc_intel_braswell_config::lpss_acpi_mode

Definition at line 60 of file chip.h.

◆ PcdCaMirrorEn

uint8_t soc_intel_braswell_config::PcdCaMirrorEn

Definition at line 83 of file chip.h.

◆ PcdDvfsEnable

uint8_t soc_intel_braswell_config::PcdDvfsEnable

Definition at line 82 of file chip.h.

◆ PcdEmmcMode

uint8_t soc_intel_braswell_config::PcdEmmcMode

Definition at line 108 of file chip.h.

◆ PcdEnableAzalia

uint8_t soc_intel_braswell_config::PcdEnableAzalia

Definition at line 92 of file chip.h.

◆ PcdEnableDma0

uint8_t soc_intel_braswell_config::PcdEnableDma0

Definition at line 96 of file chip.h.

◆ PcdEnableDma1

uint8_t soc_intel_braswell_config::PcdEnableDma1

Definition at line 97 of file chip.h.

◆ PcdEnableHsuart0

uint8_t soc_intel_braswell_config::PcdEnableHsuart0

Definition at line 90 of file chip.h.

◆ PcdEnableHsuart1

uint8_t soc_intel_braswell_config::PcdEnableHsuart1

Definition at line 91 of file chip.h.

◆ PcdEnableI2C0

uint8_t soc_intel_braswell_config::PcdEnableI2C0

Definition at line 98 of file chip.h.

◆ PcdEnableI2C1

uint8_t soc_intel_braswell_config::PcdEnableI2C1

Definition at line 99 of file chip.h.

◆ PcdEnableI2C2

uint8_t soc_intel_braswell_config::PcdEnableI2C2

Definition at line 100 of file chip.h.

◆ PcdEnableI2C3

uint8_t soc_intel_braswell_config::PcdEnableI2C3

Definition at line 101 of file chip.h.

◆ PcdEnableI2C4

uint8_t soc_intel_braswell_config::PcdEnableI2C4

Definition at line 102 of file chip.h.

◆ PcdEnableI2C5

uint8_t soc_intel_braswell_config::PcdEnableI2C5

Definition at line 103 of file chip.h.

◆ PcdEnableI2C6

uint8_t soc_intel_braswell_config::PcdEnableI2C6

Definition at line 104 of file chip.h.

◆ PcdEnableLpe

uint8_t soc_intel_braswell_config::PcdEnableLpe

Definition at line 95 of file chip.h.

◆ PcdEnableSata

uint8_t soc_intel_braswell_config::PcdEnableSata

Definition at line 93 of file chip.h.

◆ PcdEnableXhci

uint8_t soc_intel_braswell_config::PcdEnableXhci

Definition at line 94 of file chip.h.

◆ PcdIgdDvmt50PreAlloc

uint8_t soc_intel_braswell_config::PcdIgdDvmt50PreAlloc

Definition at line 81 of file chip.h.

◆ PcdMrcInitSpdAddr1

uint8_t soc_intel_braswell_config::PcdMrcInitSpdAddr1

Definition at line 79 of file chip.h.

◆ PcdMrcInitSpdAddr2

uint8_t soc_intel_braswell_config::PcdMrcInitSpdAddr2

Definition at line 80 of file chip.h.

◆ PcdPchSsicEnable

uint8_t soc_intel_braswell_config::PcdPchSsicEnable

Definition at line 135 of file chip.h.

◆ PcdPchUsbHsicPort

uint8_t soc_intel_braswell_config::PcdPchUsbHsicPort

Definition at line 134 of file chip.h.

◆ PcdPchUsbSsicPort

uint8_t soc_intel_braswell_config::PcdPchUsbSsicPort

Definition at line 133 of file chip.h.

◆ PcdSdcardMode

uint8_t soc_intel_braswell_config::PcdSdcardMode

Definition at line 89 of file chip.h.

◆ PcdSdDetectChk

uint8_t soc_intel_braswell_config::PcdSdDetectChk

Definition at line 139 of file chip.h.

◆ pcie_wake_enable

bool soc_intel_braswell_config::pcie_wake_enable

Definition at line 66 of file chip.h.

◆ PMIC_I2CBus

uint8_t soc_intel_braswell_config::PMIC_I2CBus

Definition at line 136 of file chip.h.

◆ PunitPwrConfigDisable

uint8_t soc_intel_braswell_config::PunitPwrConfigDisable

Definition at line 105 of file chip.h.

◆ sd_acpi_mode

bool soc_intel_braswell_config::sd_acpi_mode

Definition at line 62 of file chip.h.

◆ sdcard_cap_high

uint32_t soc_intel_braswell_config::sdcard_cap_high

Definition at line 57 of file chip.h.

◆ sdcard_cap_low

uint32_t soc_intel_braswell_config::sdcard_cap_low

Definition at line 56 of file chip.h.

◆ serirq_mode

enum serirq_mode soc_intel_braswell_config::serirq_mode

Definition at line 45 of file chip.h.

◆ Usb2Port0IUsbTxEmphasisEn

uint8_t soc_intel_braswell_config::Usb2Port0IUsbTxEmphasisEn

Definition at line 111 of file chip.h.

◆ Usb2Port0PerPortPeTxiSet

uint8_t soc_intel_braswell_config::Usb2Port0PerPortPeTxiSet

Definition at line 109 of file chip.h.

◆ Usb2Port0PerPortTxiSet

uint8_t soc_intel_braswell_config::Usb2Port0PerPortTxiSet

Definition at line 110 of file chip.h.

◆ Usb2Port0PerPortTxPeHalf

uint8_t soc_intel_braswell_config::Usb2Port0PerPortTxPeHalf

Definition at line 112 of file chip.h.

◆ Usb2Port1IUsbTxEmphasisEn

uint8_t soc_intel_braswell_config::Usb2Port1IUsbTxEmphasisEn

Definition at line 115 of file chip.h.

◆ Usb2Port1PerPortPeTxiSet

uint8_t soc_intel_braswell_config::Usb2Port1PerPortPeTxiSet

Definition at line 113 of file chip.h.

◆ Usb2Port1PerPortTxiSet

uint8_t soc_intel_braswell_config::Usb2Port1PerPortTxiSet

Definition at line 114 of file chip.h.

◆ Usb2Port1PerPortTxPeHalf

uint8_t soc_intel_braswell_config::Usb2Port1PerPortTxPeHalf

Definition at line 116 of file chip.h.

◆ Usb2Port2IUsbTxEmphasisEn

uint8_t soc_intel_braswell_config::Usb2Port2IUsbTxEmphasisEn

Definition at line 119 of file chip.h.

◆ Usb2Port2PerPortPeTxiSet

uint8_t soc_intel_braswell_config::Usb2Port2PerPortPeTxiSet

Definition at line 117 of file chip.h.

◆ Usb2Port2PerPortTxiSet

uint8_t soc_intel_braswell_config::Usb2Port2PerPortTxiSet

Definition at line 118 of file chip.h.

◆ Usb2Port2PerPortTxPeHalf

uint8_t soc_intel_braswell_config::Usb2Port2PerPortTxPeHalf

Definition at line 120 of file chip.h.

◆ Usb2Port3IUsbTxEmphasisEn

uint8_t soc_intel_braswell_config::Usb2Port3IUsbTxEmphasisEn

Definition at line 123 of file chip.h.

◆ Usb2Port3PerPortPeTxiSet

uint8_t soc_intel_braswell_config::Usb2Port3PerPortPeTxiSet

Definition at line 121 of file chip.h.

◆ Usb2Port3PerPortTxiSet

uint8_t soc_intel_braswell_config::Usb2Port3PerPortTxiSet

Definition at line 122 of file chip.h.

◆ Usb2Port3PerPortTxPeHalf

uint8_t soc_intel_braswell_config::Usb2Port3PerPortTxPeHalf

Definition at line 124 of file chip.h.

◆ Usb2Port4IUsbTxEmphasisEn

uint8_t soc_intel_braswell_config::Usb2Port4IUsbTxEmphasisEn

Definition at line 127 of file chip.h.

◆ Usb2Port4PerPortPeTxiSet

uint8_t soc_intel_braswell_config::Usb2Port4PerPortPeTxiSet

Definition at line 125 of file chip.h.

◆ Usb2Port4PerPortTxiSet

uint8_t soc_intel_braswell_config::Usb2Port4PerPortTxiSet

Definition at line 126 of file chip.h.

◆ Usb2Port4PerPortTxPeHalf

uint8_t soc_intel_braswell_config::Usb2Port4PerPortTxPeHalf

Definition at line 128 of file chip.h.

◆ Usb3Lane0Ow2tapgen2deemph3p5

uint8_t soc_intel_braswell_config::Usb3Lane0Ow2tapgen2deemph3p5

Definition at line 129 of file chip.h.

◆ Usb3Lane1Ow2tapgen2deemph3p5

uint8_t soc_intel_braswell_config::Usb3Lane1Ow2tapgen2deemph3p5

Definition at line 130 of file chip.h.

◆ Usb3Lane2Ow2tapgen2deemph3p5

uint8_t soc_intel_braswell_config::Usb3Lane2Ow2tapgen2deemph3p5

Definition at line 131 of file chip.h.

◆ Usb3Lane3Ow2tapgen2deemph3p5

uint8_t soc_intel_braswell_config::Usb3Lane3Ow2tapgen2deemph3p5

Definition at line 132 of file chip.h.

◆ usb_comp_bg

enum usb_comp_bg_value soc_intel_braswell_config::usb_comp_bg

Definition at line 66 of file chip.h.


The documentation for this struct was generated from the following file: