coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
nvs.h
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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/* TODO: Check if this is still correct */
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/*
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* NOTE: The layout of the global_nvs structure below must match the layout
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* in soc/soc/amd/sabrina/acpi/globalnvs.asl !!!
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*
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*/
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#ifndef AMD_SABRINA_NVS_H
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#define AMD_SABRINA_NVS_H
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#include <
stdint.h
>
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struct
__packed
global_nvs
{
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/* Miscellaneous */
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uint8_t
unused_was_pcnt;
/* 0x00 - Processor Count */
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uint8_t
lids;
/* 0x01 - LID State */
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uint8_t
unused_was_pwrs;
/* 0x02 - AC Power State */
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uint32_t
cbmc;
/* 0x03 - 0x06 - coreboot Memory Console */
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uint64_t
pm1i;
/* 0x07 - 0x0e - System Wake Source - PM1 Index */
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uint64_t
gpei;
/* 0x0f - 0x16 - GPE Wake Source */
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uint8_t
tmps;
/* 0x17 - Temperature Sensor ID */
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uint8_t
tcrt;
/* 0x18 - Critical Threshold */
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uint8_t
tpsv;
/* 0x19 - Passive Threshold */
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};
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#endif
/* AMD_SABRINA_NVS_H */
stdint.h
uint32_t
unsigned int uint32_t
Definition:
stdint.h:14
uint64_t
unsigned long long uint64_t
Definition:
stdint.h:17
uint8_t
unsigned char uint8_t
Definition:
stdint.h:8
__packed
Definition:
x86.c:23
global_nvs
Definition:
nvs.h:14
src
soc
amd
sabrina
include
soc
nvs.h
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