11 #define SDW_PFX "mipi-sdw-"
14 #define SDW_INT(__key, __val) \
15 acpi_dp_add_integer(dsd, SDW_PFX __key, __val)
18 #define SDW_INT_ARRAY(__key, __val) \
19 acpi_dp_add_integer_array(dsd, SDW_PFX __key, __val, __val##_count)
32 {
"BRA0",
SDW_PFX "port-bra-mode-0" },
33 {
"BRA1",
SDW_PFX "port-bra-mode-1" },
34 {
"BRA2",
SDW_PFX "port-bra-mode-2" },
35 {
"BRA3",
SDW_PFX "port-bra-mode-3" },
39 {
"MOD0",
SDW_PFX "port-audio-mode-0" },
40 {
"MOD1",
SDW_PFX "port-audio-mode-1" },
41 {
"MOD2",
SDW_PFX "port-audio-mode-2" },
42 {
"MOD3",
SDW_PFX "port-audio-mode-3" },
46 {
"DP0",
SDW_PFX "dp-0-subproperties" },
47 {
"SRC1",
SDW_PFX "dp-1-source-subproperties" },
48 {
"SRC2",
SDW_PFX "dp-2-source-subproperties" },
49 {
"SRC3",
SDW_PFX "dp-3-source-subproperties" },
50 {
"SRC4",
SDW_PFX "dp-4-source-subproperties" },
51 {
"SRC5",
SDW_PFX "dp-5-source-subproperties" },
52 {
"SRC6",
SDW_PFX "dp-6-source-subproperties" },
53 {
"SRC7",
SDW_PFX "dp-7-source-subproperties" },
54 {
"SRC8",
SDW_PFX "dp-8-source-subproperties" },
55 {
"SRC9",
SDW_PFX "dp-9-source-subproperties" },
56 {
"SRCA",
SDW_PFX "dp-10-source-subproperties" },
57 {
"SRCB",
SDW_PFX "dp-11-source-subproperties" },
58 {
"SRCC",
SDW_PFX "dp-12-source-subproperties" },
59 {
"SRCD",
SDW_PFX "dp-13-source-subproperties" }
63 {
"DP0",
SDW_PFX "dp-0-subproperties" },
64 {
"SNK1",
SDW_PFX "dp-1-sink-subproperties" },
65 {
"SNK2",
SDW_PFX "dp-2-sink-subproperties" },
66 {
"SNK3",
SDW_PFX "dp-3-sink-subproperties" },
67 {
"SNK4",
SDW_PFX "dp-4-sink-subproperties" },
68 {
"SNK5",
SDW_PFX "dp-5-sink-subproperties" },
69 {
"SNK6",
SDW_PFX "dp-6-sink-subproperties" },
70 {
"SNK7",
SDW_PFX "dp-7-sink-subproperties" },
71 {
"SNK8",
SDW_PFX "dp-8-sink-subproperties" },
72 {
"SNK9",
SDW_PFX "dp-9-sink-subproperties" },
73 {
"SNKA",
SDW_PFX "dp-10-sink-subproperties" },
74 {
"SNKB",
SDW_PFX "dp-11-sink-subproperties" },
75 {
"SNKC",
SDW_PFX "dp-12-sink-subproperties" },
76 {
"SNKD",
SDW_PFX "dp-13-sink-subproperties" }
80 {
"LNK0",
SDW_PFX "link-0-subproperties" },
81 {
"LNK1",
SDW_PFX "link-1-subproperties" },
82 {
"LNK2",
SDW_PFX "link-2-subproperties" },
83 {
"LNK3",
SDW_PFX "link-3-subproperties" },
84 {
"LNK4",
SDW_PFX "link-4-subproperties" },
85 {
"LNK5",
SDW_PFX "link-5-subproperties" },
86 {
"LNK6",
SDW_PFX "link-6-subproperties" },
87 {
"LNK7",
SDW_PFX "link-7-subproperties" }
147 SDW_INT(
"simplified-clockstopprepare-sm-supported",
152 SDW_INT(
"clockstopprepare-hard-reset-behavior",
333 link_prop_cb(link, i, prop);
376 dp_prop_cb(dp0, 0, codec);
399 for (entry = codec->
dpn; entry; entry++) {
413 dp_prop_cb(dpn, entry->
port, codec);
423 dp_prop_cb(dpn, entry->
port, codec);
struct acpi_dp * acpi_dp_add_child(struct acpi_dp *dp, const char *name, struct acpi_dp *child)
struct acpi_dp * acpi_dp_add_string(struct acpi_dp *dp, const char *name, const char *string)
struct acpi_dp * acpi_dp_add_integer(struct acpi_dp *dp, const char *name, uint64_t value)
struct acpi_dp * acpi_dp_new_table(const char *name)
static void soundwire_gen_dpn(struct acpi_dp *dsd, const struct soundwire_dpn *prop)
static const struct soundwire_name_map bra_mode_names[]
static void soundwire_gen_link(struct acpi_dp *dsd, const struct soundwire_link *prop)
static void soundwire_gen_dp0(struct acpi_dp *dsd, const struct soundwire_dp0 *prop)
static const struct soundwire_name_map link_names[]
static const struct soundwire_name_map audio_mode_names[]
static const char *const multilane_slave_link_names[]
static const char *const multilane_master_lane_names[]
static void soundwire_gen_slave(struct acpi_dp *dsd, const struct soundwire_slave *prop)
static void soundwire_gen_multilane(struct acpi_dp *dsd, const struct soundwire_multilane *prop)
static const char *const multilane_names[]
static const struct soundwire_name_map dpn_sink_names[]
#define SDW_INT_ARRAY(__key, __val)
static void soundwire_gen_audio_mode(struct acpi_dp *dsd, const struct soundwire_audio_mode *prop)
void soundwire_gen_controller(struct acpi_dp *dsd, const struct soundwire_controller *prop, soundwire_link_prop_cb link_prop_cb)
soundwire_gen_controller() - Generate SoundWire properties for master links.
static void soundwire_gen_interface_revision(struct acpi_dp *dsd)
static const struct soundwire_name_map dpn_source_names[]
static void soundwire_gen_bra_mode(struct acpi_dp *dsd, const struct soundwire_bra_mode *prop)
#define SDW_INT(__key, __val)
static const char *const multilane_bus_holder_names[]
void soundwire_gen_codec(struct acpi_dp *dsd, const struct soundwire_codec *codec, soundwire_dp_prop_cb dp_prop_cb)
soundwire_gen_codec() - Generate SoundWire properties for codec device.
void soundwire_dp_prop_cb(struct acpi_dp *dsd, unsigned int port_id, const struct soundwire_codec *codec)
soundwire_dp_prop_cb() - Callback to add custom data port properties.
void soundwire_link_prop_cb(struct acpi_dp *dsd, unsigned int link_id, const struct soundwire_controller *controller)
soundwire_link_prop_cb() - Callback to add custom link properties.
@ SOUNDWIRE_SW_VERSION_1_0
struct soundwire_audio_mode - Properties for each supported Audio Mode.
uint64_t bus_frequency_configs[SOUNDWIRE_MAX]
unsigned int max_sampling_frequency
unsigned int min_bus_frequency
unsigned int min_sampling_frequency
enum soundwire_prepare_channel_behavior prepare_channel_behavior
uint64_t sampling_frequency_configs[SOUNDWIRE_MAX]
unsigned int max_bus_frequency
size_t bus_frequency_configs_count
size_t sampling_frequency_configs_count
uint32_t glitchless_transitions
struct soundwire_bra_mode - Bulk Register Access mode properties.
uint64_t bus_frequency_configs[SOUNDWIRE_MAX]
unsigned int min_bus_frequency
size_t bus_frequency_configs_count
unsigned int max_bus_frequency
unsigned int max_data_per_frame
unsigned int min_us_between_transactions
struct soundwire_codec - Contains all configuration for a SoundWire codec slave device.
struct soundwire_dp0 * dp0
struct soundwire_dpn_entry dpn[SOUNDWIRE_MAX_DPN - SOUNDWIRE_MIN_DPN]
struct soundwire_slave * slave
struct soundwire_bra_mode * dp0_bra_mode[SOUNDWIRE_MAX_MODE]
struct soundwire_audio_mode * audio_mode[SOUNDWIRE_MAX_MODE]
struct soundwire_multilane * multilane
struct soundwire_controller - SoundWire controller properties.
struct soundwire_link master_list[SOUNDWIRE_MAX_LINK]
unsigned int master_list_count
struct soundwire_dp0 - Configuration properties for SoundWire DP0 Data Port.
bool bra_imp_def_response_supported
bool simplified_channel_prepare_sm
size_t port_wordlength_configs_count
unsigned int port_min_wordlength
bool imp_def_bpt_supported
unsigned int imp_def_dp0_interrupts_supported
uint64_t port_wordlength_configs[SOUNDWIRE_MAX]
unsigned int port_max_wordlength
struct soundwire_dpn_entry - Full duplex data port properties for DPn 1-14.
struct soundwire_dpn * sink
struct soundwire_dpn * source
struct soundwire_dpn - Configuration properties for SoundWire DPn Data Ports.
enum soundwire_block_group_count max_grouping_supported
uint64_t port_wordlength_configs[SOUNDWIRE_MAX]
uint64_t channel_number_list[SOUNDWIRE_MAX]
size_t port_wordlength_configs_count
enum soundwire_mode_bitmap modes_supported
enum soundwire_data_port_type data_port_type
unsigned int port_max_wordlength
bool simplified_channelprepare_sm
size_t channel_number_list_count
unsigned int max_channel_number
uint32_t port_encoding_type
size_t port_audio_mode_count
size_t channel_combination_list_count
unsigned int port_min_wordlength
uint32_t imp_def_dpn_interrupts_supported
unsigned int port_channelprepare_timeout
unsigned int max_async_buffer
uint64_t channel_combination_list[SOUNDWIRE_MAX]
unsigned int min_channel_number
struct soundwire_link - SoundWire master device properties.
uint64_t clock_frequencies_supported[SOUNDWIRE_MAX]
unsigned int default_frame_col_size
unsigned int command_error_threshold
unsigned int default_frame_row_size
size_t clock_frequencies_supported_count
unsigned int default_frame_rate
bool clock_stop_mode1_supported
bool clock_stop_mode0_supported
struct soundwire_multilane_map - Pair a soundwire lane with direction.
enum soundwire_multilane_dir direction
union soundwire_multilane_map::lane_type connection
struct soundwire_multilane - Multi-Lane SoundWire slave device.
size_t lane_mapping_count
bool lane_bus_holder[SOUNDWIRE_MAX_LANE]
size_t lane_bus_holder_count
struct soundwire_multilane_map lane_mapping[SOUNDWIRE_MAX_LANE]
struct soundwire_name_map - Map ACPI name to SoundWire property name.
struct soundwire_slave - SoundWire slave device properties.
unsigned int clockstopprepare_timeout
uint32_t source_port_list
bool simplified_clockstopprepare_sm_supported
unsigned int slave_channelprepare_timeout
bool port15_read_behavior
bool bank_delay_supported
bool clock_stop_mode1_supported
bool clockstopprepare_hard_reset_behavior