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coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
lpc_def.h File Reference
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Macros

#define LPC_SERIRQ_CTL   0x64
 
#define LPC_SCNT_EN   (1 << 7)
 
#define LPC_SCNT_MODE   (1 << 6)
 
#define LPC_IO_DECODE   0x80
 
#define LPC_IOD_COMA_RANGE_MASK   (7 << 0)
 
#define LPC_IOD_COMB_RANGE_MASK   (7 << 4)
 
#define LPC_IOD_COMA_RANGE   (0 << 0) /* 0x3F8 - 0x3FF COMA */
 
#define LPC_IOD_COMB_RANGE   (1 << 4) /* 0x2F8 - 0x2FF COMB */
 
#define LPC_IO_ENABLES   0x82
 
#define LPC_GENERIC_IO_RANGE(n)   ((((n) & 0x3) * 4) + 0x84)
 
#define LPC_LGIR_AMASK_MASK   (0xfc << 16)
 
#define LPC_LGIR_ADDR_MASK   0xfffc
 
#define LPC_LGIR_EN   (1 << 0)
 
#define LPC_LGIR_MAX_WINDOW_SIZE   256
 
#define LPC_GENERIC_MEM_RANGE   0x98
 
#define LPC_LGMR_ADDR_MASK   0xffff0000
 
#define LPC_LGMR_EN   (1 << 0)
 
#define LPC_LGMR_WINDOW_SIZE   (64 * KiB)
 
#define LPC_BIOS_CNTL   0xdc
 
#define LPC_BC_BILD   (1 << 7) /* BILD */
 
#define LPC_BC_LE   (1 << 1) /* LE */
 
#define LPC_BC_WPD   (1 << 0) /* WPD */
 
#define LPC_BC_EISS   (1 << 5) /* EISS */
 
#define LPC_PCCTL   0xE0 /* PCI Clock Control */
 
#define LPC_PCCTL_CLKRUN_EN   (1 << 0)
 

Macro Definition Documentation

◆ LPC_BC_BILD

#define LPC_BC_BILD   (1 << 7) /* BILD */

Definition at line 27 of file lpc_def.h.

◆ LPC_BC_EISS

#define LPC_BC_EISS   (1 << 5) /* EISS */

Definition at line 30 of file lpc_def.h.

◆ LPC_BC_LE

#define LPC_BC_LE   (1 << 1) /* LE */

Definition at line 28 of file lpc_def.h.

◆ LPC_BC_WPD

#define LPC_BC_WPD   (1 << 0) /* WPD */

Definition at line 29 of file lpc_def.h.

◆ LPC_BIOS_CNTL

#define LPC_BIOS_CNTL   0xdc

Definition at line 26 of file lpc_def.h.

◆ LPC_GENERIC_IO_RANGE

#define LPC_GENERIC_IO_RANGE (   n)    ((((n) & 0x3) * 4) + 0x84)

Definition at line 17 of file lpc_def.h.

◆ LPC_GENERIC_MEM_RANGE

#define LPC_GENERIC_MEM_RANGE   0x98

Definition at line 22 of file lpc_def.h.

◆ LPC_IO_DECODE

#define LPC_IO_DECODE   0x80

Definition at line 9 of file lpc_def.h.

◆ LPC_IO_ENABLES

#define LPC_IO_ENABLES   0x82

Definition at line 16 of file lpc_def.h.

◆ LPC_IOD_COMA_RANGE

#define LPC_IOD_COMA_RANGE   (0 << 0) /* 0x3F8 - 0x3FF COMA */

Definition at line 12 of file lpc_def.h.

◆ LPC_IOD_COMA_RANGE_MASK

#define LPC_IOD_COMA_RANGE_MASK   (7 << 0)

Definition at line 10 of file lpc_def.h.

◆ LPC_IOD_COMB_RANGE

#define LPC_IOD_COMB_RANGE   (1 << 4) /* 0x2F8 - 0x2FF COMB */

Definition at line 13 of file lpc_def.h.

◆ LPC_IOD_COMB_RANGE_MASK

#define LPC_IOD_COMB_RANGE_MASK   (7 << 4)

Definition at line 11 of file lpc_def.h.

◆ LPC_LGIR_ADDR_MASK

#define LPC_LGIR_ADDR_MASK   0xfffc

Definition at line 19 of file lpc_def.h.

◆ LPC_LGIR_AMASK_MASK

#define LPC_LGIR_AMASK_MASK   (0xfc << 16)

Definition at line 18 of file lpc_def.h.

◆ LPC_LGIR_EN

#define LPC_LGIR_EN   (1 << 0)

Definition at line 20 of file lpc_def.h.

◆ LPC_LGIR_MAX_WINDOW_SIZE

#define LPC_LGIR_MAX_WINDOW_SIZE   256

Definition at line 21 of file lpc_def.h.

◆ LPC_LGMR_ADDR_MASK

#define LPC_LGMR_ADDR_MASK   0xffff0000

Definition at line 23 of file lpc_def.h.

◆ LPC_LGMR_EN

#define LPC_LGMR_EN   (1 << 0)

Definition at line 24 of file lpc_def.h.

◆ LPC_LGMR_WINDOW_SIZE

#define LPC_LGMR_WINDOW_SIZE   (64 * KiB)

Definition at line 25 of file lpc_def.h.

◆ LPC_PCCTL

#define LPC_PCCTL   0xE0 /* PCI Clock Control */

Definition at line 31 of file lpc_def.h.

◆ LPC_PCCTL_CLKRUN_EN

#define LPC_PCCTL_CLKRUN_EN   (1 << 0)

Definition at line 32 of file lpc_def.h.

◆ LPC_SCNT_EN

#define LPC_SCNT_EN   (1 << 7)

Definition at line 7 of file lpc_def.h.

◆ LPC_SCNT_MODE

#define LPC_SCNT_MODE   (1 << 6)

Definition at line 8 of file lpc_def.h.

◆ LPC_SERIRQ_CTL

#define LPC_SERIRQ_CTL   0x64

Definition at line 6 of file lpc_def.h.