coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
flash_ctrlr Struct Reference

#include <spi.h>

Collaboration diagram for flash_ctrlr:
Collaboration graph

Data Fields

uint8_t rsvd_0x00 [0x3020]
 
uint16_t status
 
uint16_t control
 
uint32_t address
 
uint8_t data [64]
 
uint8_t rsvd_0x68 [8]
 
uint32_t bbar
 
uint8_t prefix [2]
 
uint16_t type
 
uint8_t opmenu [8]
 
uint32_t pbr [3]
 

Detailed Description

Definition at line 21 of file spi.h.

Field Documentation

◆ address

uint32_t flash_ctrlr::address

Definition at line 25 of file spi.h.

Referenced by xfer().

◆ bbar

uint32_t flash_ctrlr::bbar

Definition at line 28 of file spi.h.

Referenced by spi_bios_base(), and spi_display().

◆ control

uint16_t flash_ctrlr::control

Definition at line 24 of file spi.h.

Referenced by xfer().

◆ data

uint8_t flash_ctrlr::data[64]

Definition at line 26 of file spi.h.

Referenced by xfer().

◆ opmenu

uint8_t flash_ctrlr::opmenu[8]

Definition at line 31 of file spi.h.

Referenced by spi_display(), spi_init(), and xfer().

◆ pbr

uint32_t flash_ctrlr::pbr[3]

Definition at line 32 of file spi.h.

Referenced by spi_display(), and spi_protection().

◆ prefix

uint8_t flash_ctrlr::prefix[2]

Definition at line 29 of file spi.h.

Referenced by spi_display(), spi_init(), and xfer().

◆ rsvd_0x00

uint8_t flash_ctrlr::rsvd_0x00[0x3020]

Definition at line 22 of file spi.h.

◆ rsvd_0x68

uint8_t flash_ctrlr::rsvd_0x68[8]

Definition at line 27 of file spi.h.

◆ status

uint16_t flash_ctrlr::status

Definition at line 23 of file spi.h.

Referenced by spi_controller_lock(), spi_display(), and xfer().

◆ type

uint16_t flash_ctrlr::type

Definition at line 30 of file spi.h.

Referenced by spi_display(), spi_init(), and xfer().


The documentation for this struct was generated from the following file: