Go to the source code of this file.
◆ ACPI_BASE_ADDRESS
#define ACPI_BASE_ADDRESS 0x1800 |
◆ ACPI_BASE_SIZE
#define ACPI_BASE_SIZE 0x100 |
◆ DMI_BASE_ADDRESS
#define DMI_BASE_ADDRESS 0xfeda0000 |
◆ DMI_BASE_SIZE
#define DMI_BASE_SIZE 0x1000 |
◆ EARLY_GSPI_BASE_ADDRESS
#define EARLY_GSPI_BASE_ADDRESS 0xfe030000 |
◆ EARLY_I2C_BASE
◆ EARLY_I2C_BASE_ADDRESS
#define EARLY_I2C_BASE_ADDRESS 0xfe020000 |
◆ EDRAM_BASE_ADDRESS
#define EDRAM_BASE_ADDRESS 0xfed80000 |
◆ EDRAM_BASE_SIZE
#define EDRAM_BASE_SIZE 0x4000 |
◆ EP_BASE_ADDRESS
#define EP_BASE_ADDRESS 0xfeda1000 |
◆ EP_BASE_SIZE
#define EP_BASE_SIZE 0x1000 |
◆ GFXVT_BASE_ADDRESS
#define GFXVT_BASE_ADDRESS 0xfed90000 |
◆ GFXVT_BASE_SIZE
#define GFXVT_BASE_SIZE 0x1000 |
◆ GPIO_BASE_SIZE
#define GPIO_BASE_SIZE 0x10000 |
◆ HECI1_BASE_ADDRESS
#define HECI1_BASE_ADDRESS 0xfeda2000 |
◆ IOM_BASE_ADDRESS
#define IOM_BASE_ADDRESS 0xfbc10000 |
◆ IOM_BASE_SIZE
#define IOM_BASE_SIZE 0x1600 |
◆ IPUVT_BASE_ADDRESS
#define IPUVT_BASE_ADDRESS 0xfed92000 |
◆ IPUVT_BASE_SIZE
#define IPUVT_BASE_SIZE 0x1000 |
◆ MCH_BASE_ADDRESS
#define MCH_BASE_ADDRESS 0xfedc0000 |
◆ MCH_BASE_SIZE
#define MCH_BASE_SIZE 0x20000 |
◆ P2SB_BAR
#define P2SB_BAR CONFIG_PCR_BASE_ADDRESS |
◆ P2SB_SIZE
#define P2SB_SIZE (16 * MiB) |
◆ PCH_PRESERVED_BASE_ADDRESS
#define PCH_PRESERVED_BASE_ADDRESS 0xfc800000 |
◆ PCH_PRESERVED_BASE_SIZE
#define PCH_PRESERVED_BASE_SIZE 0x02000000 |
◆ PCH_PWRM_BASE_ADDRESS
#define PCH_PWRM_BASE_ADDRESS 0xfe000000 |
◆ PCH_PWRM_BASE_SIZE
#define PCH_PWRM_BASE_SIZE 0x10000 |
◆ PCH_TRACE_HUB_BASE_ADDRESS
#define PCH_TRACE_HUB_BASE_ADDRESS 0xfc800000 |
◆ PCH_TRACE_HUB_BASE_SIZE
#define PCH_TRACE_HUB_BASE_SIZE 0x00800000 |
◆ REG_BASE_ADDRESS
#define REG_BASE_ADDRESS 0xfb000000 |
◆ REG_BASE_SIZE
#define REG_BASE_SIZE 0x1000 |
◆ SMBUS_BASE_ADDRESS
#define SMBUS_BASE_ADDRESS 0x0efa0 |
◆ SMBUS_BASE_SIZE
#define SMBUS_BASE_SIZE 0x20 |
◆ SPI_BASE_ADDRESS
#define SPI_BASE_ADDRESS 0xfe010000 |
◆ TBT0_BASE_ADDRESS
#define TBT0_BASE_ADDRESS 0xfed84000 |
◆ TBT0_BASE_SIZE
#define TBT0_BASE_SIZE 0x1000 |
◆ TBT1_BASE_ADDRESS
#define TBT1_BASE_ADDRESS 0xfed85000 |
◆ TBT1_BASE_SIZE
#define TBT1_BASE_SIZE 0x1000 |
◆ TBT2_BASE_ADDRESS
#define TBT2_BASE_ADDRESS 0xfed86000 |
◆ TBT2_BASE_SIZE
#define TBT2_BASE_SIZE 0x1000 |
◆ TBT3_BASE_ADDRESS
#define TBT3_BASE_ADDRESS 0xfed87000 |
◆ TBT3_BASE_SIZE
#define TBT3_BASE_SIZE 0x1000 |
◆ TCO_BASE_ADDRESS
#define TCO_BASE_ADDRESS 0x400 |
◆ TCO_BASE_SIZE
#define TCO_BASE_SIZE 0x20 |
◆ UART_BASE
◆ UART_BASE_0_ADDR
#define UART_BASE_0_ADDR |
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#define UART_BASE_0_ADDRESS
Definition at line 33 of file iomap.h.
◆ UART_BASE_0_ADDRESS
#define UART_BASE_0_ADDRESS 0xfe03e000 |
◆ UART_BASE_SIZE
#define UART_BASE_SIZE 0x1000 |
◆ VTD_BASE_ADDRESS
#define VTD_BASE_ADDRESS 0xfed90000 |
◆ VTD_BASE_SIZE
#define VTD_BASE_SIZE 0x00004000 |
◆ VTVC0_BASE_ADDRESS
#define VTVC0_BASE_ADDRESS 0xfed91000 |
◆ VTVC0_BASE_SIZE
#define VTVC0_BASE_SIZE 0x1000 |