coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
lpc.h File Reference

Go to the source code of this file.

Macros

#define SPI_BASE_ADDRESS_REGISTER   0xa0
 
#define SPI_BASE_ALIGNMENT   BIT(8)
 
#define SPI_BASE_RESERVED   (BIT(5) | BIT(6) | BIT(7))
 
#define PSP_SPI_MMIO_SEL   BIT(4)
 
#define ROUTE_TPM_2_SPI   BIT(3)
 
#define SPI_ABORT_ENABLE   BIT(2)
 
#define SPI_ROM_ENABLE   BIT(1)
 
#define SPI_ROM_ALT_ENABLE   BIT(0)
 
#define SPI_PRESERVE_BITS   (BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4))
 

Macro Definition Documentation

◆ PSP_SPI_MMIO_SEL

#define PSP_SPI_MMIO_SEL   BIT(4)

Definition at line 9 of file lpc.h.

◆ ROUTE_TPM_2_SPI

#define ROUTE_TPM_2_SPI   BIT(3)

Definition at line 10 of file lpc.h.

◆ SPI_ABORT_ENABLE

#define SPI_ABORT_ENABLE   BIT(2)

Definition at line 11 of file lpc.h.

◆ SPI_BASE_ADDRESS_REGISTER

#define SPI_BASE_ADDRESS_REGISTER   0xa0

Definition at line 6 of file lpc.h.

◆ SPI_BASE_ALIGNMENT

#define SPI_BASE_ALIGNMENT   BIT(8)

Definition at line 7 of file lpc.h.

◆ SPI_BASE_RESERVED

#define SPI_BASE_RESERVED   (BIT(5) | BIT(6) | BIT(7))

Definition at line 8 of file lpc.h.

◆ SPI_PRESERVE_BITS

#define SPI_PRESERVE_BITS   (BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4))

Definition at line 14 of file lpc.h.

◆ SPI_ROM_ALT_ENABLE

#define SPI_ROM_ALT_ENABLE   BIT(0)

Definition at line 13 of file lpc.h.

◆ SPI_ROM_ENABLE

#define SPI_ROM_ENABLE   BIT(1)

Definition at line 12 of file lpc.h.