exynos5_dmc Struct Reference

#include <dmc.h>

Collaboration diagram for exynos5_dmc:

Data Fields
unsigned int	concontrol
unsigned int	memcontrol
unsigned int	memconfig0
unsigned int	memconfig1
unsigned int	directcmd
unsigned int	prechconfig
unsigned int	phycontrol0
unsigned char	res1 [0xc]
unsigned int	pwrdnconfig
unsigned int	timingpzq
unsigned int	timingref
unsigned int	timingrow
unsigned int	timingdata
unsigned int	timingpower
unsigned int	phystatus
unsigned char	res2 [0x4]
unsigned int	chipstatus_ch0
unsigned int	chipstatus_ch1
unsigned char	res3 [0x4]
unsigned int	mrstatus
unsigned char	res4 [0x8]
unsigned int	qoscontrol0
unsigned char	resr5 [0x4]
unsigned int	qoscontrol1
unsigned char	res6 [0x4]
unsigned int	qoscontrol2
unsigned char	res7 [0x4]
unsigned int	qoscontrol3
unsigned char	res8 [0x4]
unsigned int	qoscontrol4
unsigned char	res9 [0x4]
unsigned int	qoscontrol5
unsigned char	res10 [0x4]
unsigned int	qoscontrol6
unsigned char	res11 [0x4]
unsigned int	qoscontrol7
unsigned char	res12 [0x4]
unsigned int	qoscontrol8
unsigned char	res13 [0x4]
unsigned int	qoscontrol9
unsigned char	res14 [0x4]
unsigned int	qoscontrol10
unsigned char	res15 [0x4]
unsigned int	qoscontrol11
unsigned char	res16 [0x4]
unsigned int	qoscontrol12
unsigned char	res17 [0x4]
unsigned int	qoscontrol13
unsigned char	res18 [0x4]
unsigned int	qoscontrol14
unsigned char	res19 [0x4]
unsigned int	qoscontrol15
unsigned char	res20 [0x14]
unsigned int	ivcontrol
unsigned int	wrtra_config
unsigned int	rdlvl_config
unsigned char	res21 [0x8]
unsigned int	brbrsvconfig
unsigned int	brbqosconfig
unsigned int	membaseconfig0
unsigned int	membaseconfig1
unsigned char	res22 [0xc]
unsigned int	wrlvl_config
unsigned char	res23 [0xc]
unsigned int	perevcontrol
unsigned int	perev0config
unsigned int	perev1config
unsigned int	perev2config
unsigned int	perev3config
unsigned char	res24 [0xdebc]
unsigned int	pmnc_ppc_a
unsigned char	res25 [0xc]
unsigned int	cntens_ppc_a
unsigned char	res26 [0xc]
unsigned int	cntenc_ppc_a
unsigned char	res27 [0xc]
unsigned int	intens_ppc_a
unsigned char	res28 [0xc]
unsigned int	intenc_ppc_a
unsigned char	res29 [0xc]
unsigned int	flag_ppc_a
unsigned char	res30 [0xac]
unsigned int	ccnt_ppc_a
unsigned char	res31 [0xc]
unsigned int	pmcnt0_ppc_a
unsigned char	res32 [0xc]
unsigned int	pmcnt1_ppc_a
unsigned char	res33 [0xc]
unsigned int	pmcnt2_ppc_a
unsigned char	res34 [0xc]
unsigned int	pmcnt3_ppc_a
uint32_t	concontrol
uint32_t	memcontrol
uint32_t	cgcontrol
uint32_t	memconfig1
uint32_t	directcmd
uint32_t	prechconfig0
uint32_t	phycontrol0
uint32_t	prechconfig1
uint8_t	res1 [0x8]
uint32_t	pwrdnconfig
uint32_t	timingpzq
uint32_t	timingref
uint32_t	timingrow
uint32_t	timingdata
uint32_t	timingpower
uint32_t	phystatus
uint8_t	res2 [0x4]
uint32_t	chipstatus_ch0
uint32_t	chipstatus_ch1
uint8_t	res3 [0x4]
uint32_t	mrstatus
uint8_t	res4 [0x8]
uint32_t	qoscontrol0
uint8_t	resr5 [0x4]
uint32_t	qoscontrol1
uint8_t	res6 [0x4]
uint32_t	qoscontrol2
uint8_t	res7 [0x4]
uint32_t	qoscontrol3
uint8_t	res8 [0x4]
uint32_t	qoscontrol4
uint8_t	res9 [0x4]
uint32_t	qoscontrol5
uint8_t	res10 [0x4]
uint32_t	qoscontrol6
uint8_t	res11 [0x4]
uint32_t	qoscontrol7
uint8_t	res12 [0x4]
uint32_t	qoscontrol8
uint8_t	res13 [0x4]
uint32_t	qoscontrol9
uint8_t	res14 [0x4]
uint32_t	qoscontrol10
uint8_t	res15 [0x4]
uint32_t	qoscontrol11
uint8_t	res16 [0x4]
uint32_t	qoscontrol12
uint8_t	res17 [0x4]
uint32_t	qoscontrol13
uint8_t	res18 [0x4]
uint32_t	qoscontrol14
uint8_t	res19 [0x4]
uint32_t	qoscontrol15
uint8_t	res20 [0x4]
uint32_t	timing_set_sw
uint32_t	timingrow1
uint32_t	timingdata1
uint32_t	timingpower1
uint32_t	ivcontrol
uint32_t	wrtra_config
uint32_t	rdlvl_config
uint8_t	res21 [0x4]
uint32_t	brbrsvcontrol
uint32_t	brbrsvconfig
uint32_t	brbqosconfig
uint32_t	membaseconfig0
uint32_t	membaseconfig1
uint8_t	res22 [0xc]
uint32_t	wrlvl_config0
uint32_t	wrlvl_config1
uint32_t	wrlvl_status
uint8_t	res23 [0x4]
uint32_t	perevcontrol
uint32_t	perev0config
uint32_t	perev1config
uint32_t	perev2config
uint32_t	perev3config
uint8_t	res22a [0xc]
uint32_t	ctrl_io_rdata_ch0
uint32_t	ctrl_io_rdata_ch1
uint8_t	res23a [0x8]
uint32_t	cacal_config0
uint32_t	cacal_config1
uint32_t	cacal_status
uint8_t	res24 [0x94]
uint32_t	emergent_config0
uint32_t	emergent_config1
uint8_t	res25 [0x8]
uint32_t	bp_control0
uint32_t	bp_control0_r
uint32_t	bp_control0_w
uint8_t	res26 [0x4]
uint32_t	bp_control1
uint32_t	bp_control1_r
uint32_t	bp_control1_w
uint8_t	res27 [0x4]
uint32_t	bp_control2
uint32_t	bp_control2_r
uint32_t	bp_control2_w
uint8_t	res28 [0x4]
uint32_t	bp_control3
uint32_t	bp_control3_r
uint32_t	bp_control3_w
uint8_t	res29 [0xb4]
uint32_t	winconfig_odt_w
uint8_t	res30 [0x4]
uint32_t	winconfig_ctrl_read
uint32_t	winconfig_ctrl_gate
uint8_t	res31 [0xdcf0]
uint32_t	pmnc_ppc
uint8_t	res32 [0xc]
uint32_t	cntens_ppc
uint8_t	res33 [0xc]
uint32_t	cntenc_ppc
uint8_t	res34 [0xc]
uint32_t	intens_ppc
uint8_t	res35 [0xc]
uint32_t	intenc_ppc
uint8_t	res36 [0xc]
uint32_t	flag_ppc
uint8_t	res37 [0xac]
uint32_t	ccnt_ppc
uint8_t	res38 [0xc]
uint32_t	pmcnt0_ppc
uint8_t	res39 [0xc]
uint32_t	pmcnt1_ppc
uint8_t	res40 [0xc]
uint32_t	pmcnt2_ppc
uint8_t	res41 [0xc]
uint32_t	pmcnt3_ppc

Detailed Description

Definition at line 10 of file dmc.h.

Field Documentation

bp_control0

uint32_t exynos5_dmc::bp_control0

Definition at line 151 of file dmc.h.

bp_control0_r

uint32_t exynos5_dmc::bp_control0_r

Definition at line 152 of file dmc.h.

bp_control0_w

uint32_t exynos5_dmc::bp_control0_w

Definition at line 153 of file dmc.h.

bp_control1

uint32_t exynos5_dmc::bp_control1

Definition at line 155 of file dmc.h.

bp_control1_r

uint32_t exynos5_dmc::bp_control1_r

Definition at line 156 of file dmc.h.

bp_control1_w

uint32_t exynos5_dmc::bp_control1_w

Definition at line 157 of file dmc.h.

bp_control2

uint32_t exynos5_dmc::bp_control2

Definition at line 159 of file dmc.h.

bp_control2_r

uint32_t exynos5_dmc::bp_control2_r

Definition at line 160 of file dmc.h.

bp_control2_w

uint32_t exynos5_dmc::bp_control2_w

Definition at line 161 of file dmc.h.

bp_control3

uint32_t exynos5_dmc::bp_control3

Definition at line 163 of file dmc.h.

bp_control3_r

uint32_t exynos5_dmc::bp_control3_r

Definition at line 164 of file dmc.h.

bp_control3_w

uint32_t exynos5_dmc::bp_control3_w

Definition at line 165 of file dmc.h.

brbqosconfig [1/2]

unsigned int exynos5_dmc::brbqosconfig

Definition at line 69 of file dmc.h.

brbqosconfig [2/2]

uint32_t exynos5_dmc::brbqosconfig

Definition at line 127 of file dmc.h.

brbrsvconfig [1/2]

unsigned int exynos5_dmc::brbrsvconfig

Definition at line 68 of file dmc.h.

brbrsvconfig [2/2]

uint32_t exynos5_dmc::brbrsvconfig

Definition at line 126 of file dmc.h.

brbrsvcontrol

uint32_t exynos5_dmc::brbrsvcontrol

Definition at line 125 of file dmc.h.

cacal_config0

uint32_t exynos5_dmc::cacal_config0

Definition at line 144 of file dmc.h.

cacal_config1

uint32_t exynos5_dmc::cacal_config1

Definition at line 145 of file dmc.h.

cacal_status

uint32_t exynos5_dmc::cacal_status

Definition at line 146 of file dmc.h.

ccnt_ppc

uint32_t exynos5_dmc::ccnt_ppc

Definition at line 184 of file dmc.h.

ccnt_ppc_a

unsigned int exynos5_dmc::ccnt_ppc_a

Definition at line 93 of file dmc.h.

cgcontrol

uint32_t exynos5_dmc::cgcontrol

Definition at line 65 of file dmc.h.

Referenced by ddr3_mem_ctrl_init().

chipstatus_ch0 [1/2]

unsigned int exynos5_dmc::chipstatus_ch0

Definition at line 27 of file dmc.h.

chipstatus_ch0 [2/2]

uint32_t exynos5_dmc::chipstatus_ch0

Definition at line 80 of file dmc.h.

chipstatus_ch1 [1/2]

unsigned int exynos5_dmc::chipstatus_ch1

Definition at line 28 of file dmc.h.

chipstatus_ch1 [2/2]

uint32_t exynos5_dmc::chipstatus_ch1

Definition at line 81 of file dmc.h.

cntenc_ppc

uint32_t exynos5_dmc::cntenc_ppc

Definition at line 176 of file dmc.h.

cntenc_ppc_a

unsigned int exynos5_dmc::cntenc_ppc_a

Definition at line 85 of file dmc.h.

cntens_ppc

uint32_t exynos5_dmc::cntens_ppc

Definition at line 174 of file dmc.h.

cntens_ppc_a

unsigned int exynos5_dmc::cntens_ppc_a

Definition at line 83 of file dmc.h.

concontrol [1/2]

unsigned int exynos5_dmc::concontrol

Definition at line 11 of file dmc.h.

Referenced by ddr3_mem_ctrl_init().

concontrol [2/2]

uint32_t exynos5_dmc::concontrol

Definition at line 63 of file dmc.h.

ctrl_io_rdata_ch0

uint32_t exynos5_dmc::ctrl_io_rdata_ch0

Definition at line 141 of file dmc.h.

ctrl_io_rdata_ch1

uint32_t exynos5_dmc::ctrl_io_rdata_ch1

Definition at line 142 of file dmc.h.

directcmd [1/2]

unsigned int exynos5_dmc::directcmd

Definition at line 15 of file dmc.h.

Referenced by ddr3_mem_ctrl_init(), dmc_config_mrs(), and dmc_config_prech().

directcmd [2/2]

uint32_t exynos5_dmc::directcmd

Definition at line 67 of file dmc.h.

emergent_config0

uint32_t exynos5_dmc::emergent_config0

Definition at line 148 of file dmc.h.

emergent_config1

uint32_t exynos5_dmc::emergent_config1

Definition at line 149 of file dmc.h.

flag_ppc

uint32_t exynos5_dmc::flag_ppc

Definition at line 182 of file dmc.h.

flag_ppc_a

unsigned int exynos5_dmc::flag_ppc_a

Definition at line 91 of file dmc.h.

intenc_ppc

uint32_t exynos5_dmc::intenc_ppc

Definition at line 180 of file dmc.h.

intenc_ppc_a

unsigned int exynos5_dmc::intenc_ppc_a

Definition at line 89 of file dmc.h.

intens_ppc

uint32_t exynos5_dmc::intens_ppc

Definition at line 178 of file dmc.h.

intens_ppc_a

unsigned int exynos5_dmc::intens_ppc_a

Definition at line 87 of file dmc.h.

ivcontrol [1/2]

unsigned int exynos5_dmc::ivcontrol

Definition at line 64 of file dmc.h.

Referenced by ddr3_mem_ctrl_init().

ivcontrol [2/2]

uint32_t exynos5_dmc::ivcontrol

Definition at line 121 of file dmc.h.

membaseconfig0 [1/2]

unsigned int exynos5_dmc::membaseconfig0

Definition at line 70 of file dmc.h.

Referenced by ddr3_mem_ctrl_init(), and dmc_config_memory().

membaseconfig0 [2/2]

uint32_t exynos5_dmc::membaseconfig0

Definition at line 128 of file dmc.h.

membaseconfig1 [1/2]

unsigned int exynos5_dmc::membaseconfig1

Definition at line 71 of file dmc.h.

Referenced by ddr3_mem_ctrl_init(), and dmc_config_memory().

membaseconfig1 [2/2]

uint32_t exynos5_dmc::membaseconfig1

Definition at line 129 of file dmc.h.

memconfig0

unsigned int exynos5_dmc::memconfig0

Definition at line 13 of file dmc.h.

Referenced by ddr3_mem_ctrl_init(), and dmc_config_memory().

memconfig1 [1/2]

unsigned int exynos5_dmc::memconfig1

Definition at line 14 of file dmc.h.

Referenced by ddr3_mem_ctrl_init(), and dmc_config_memory().

memconfig1 [2/2]

uint32_t exynos5_dmc::memconfig1

Definition at line 66 of file dmc.h.

memcontrol [1/2]

unsigned int exynos5_dmc::memcontrol

Definition at line 12 of file dmc.h.

Referenced by ddr3_mem_ctrl_init().

memcontrol [2/2]

uint32_t exynos5_dmc::memcontrol

Definition at line 64 of file dmc.h.

mrstatus [1/2]

unsigned int exynos5_dmc::mrstatus

Definition at line 30 of file dmc.h.

mrstatus [2/2]

uint32_t exynos5_dmc::mrstatus

Definition at line 83 of file dmc.h.

perev0config [1/2]

unsigned int exynos5_dmc::perev0config

Definition at line 76 of file dmc.h.

perev0config [2/2]

uint32_t exynos5_dmc::perev0config

Definition at line 136 of file dmc.h.

perev1config [1/2]

unsigned int exynos5_dmc::perev1config

Definition at line 77 of file dmc.h.

perev1config [2/2]

uint32_t exynos5_dmc::perev1config

Definition at line 137 of file dmc.h.

perev2config [1/2]

unsigned int exynos5_dmc::perev2config

Definition at line 78 of file dmc.h.

perev2config [2/2]

uint32_t exynos5_dmc::perev2config

Definition at line 138 of file dmc.h.

perev3config [1/2]

unsigned int exynos5_dmc::perev3config

Definition at line 79 of file dmc.h.

perev3config [2/2]

uint32_t exynos5_dmc::perev3config

Definition at line 139 of file dmc.h.

perevcontrol [1/2]

unsigned int exynos5_dmc::perevcontrol

Definition at line 75 of file dmc.h.

perevcontrol [2/2]

uint32_t exynos5_dmc::perevcontrol

Definition at line 135 of file dmc.h.

phycontrol0 [1/2]

unsigned int exynos5_dmc::phycontrol0

Definition at line 17 of file dmc.h.

Referenced by ddr3_mem_ctrl_init(), and update_reset_dll().

phycontrol0 [2/2]

uint32_t exynos5_dmc::phycontrol0

Definition at line 69 of file dmc.h.

phystatus [1/2]

unsigned int exynos5_dmc::phystatus

Definition at line 25 of file dmc.h.

Referenced by ddr3_mem_ctrl_init().

phystatus [2/2]

uint32_t exynos5_dmc::phystatus

Definition at line 78 of file dmc.h.

pmcnt0_ppc

uint32_t exynos5_dmc::pmcnt0_ppc

Definition at line 186 of file dmc.h.

pmcnt0_ppc_a

unsigned int exynos5_dmc::pmcnt0_ppc_a

Definition at line 95 of file dmc.h.

pmcnt1_ppc

uint32_t exynos5_dmc::pmcnt1_ppc

Definition at line 188 of file dmc.h.

pmcnt1_ppc_a

unsigned int exynos5_dmc::pmcnt1_ppc_a

Definition at line 97 of file dmc.h.

pmcnt2_ppc

uint32_t exynos5_dmc::pmcnt2_ppc

Definition at line 190 of file dmc.h.

pmcnt2_ppc_a

unsigned int exynos5_dmc::pmcnt2_ppc_a

Definition at line 99 of file dmc.h.

pmcnt3_ppc

uint32_t exynos5_dmc::pmcnt3_ppc

Definition at line 192 of file dmc.h.

pmcnt3_ppc_a

unsigned int exynos5_dmc::pmcnt3_ppc_a

Definition at line 101 of file dmc.h.

pmnc_ppc

uint32_t exynos5_dmc::pmnc_ppc

Definition at line 172 of file dmc.h.

pmnc_ppc_a

unsigned int exynos5_dmc::pmnc_ppc_a

Definition at line 81 of file dmc.h.

prechconfig

unsigned int exynos5_dmc::prechconfig

Definition at line 16 of file dmc.h.

Referenced by ddr3_mem_ctrl_init().

prechconfig0

uint32_t exynos5_dmc::prechconfig0

Definition at line 68 of file dmc.h.

Referenced by ddr3_mem_ctrl_init().

prechconfig1

uint32_t exynos5_dmc::prechconfig1

Definition at line 70 of file dmc.h.

pwrdnconfig [1/2]

unsigned int exynos5_dmc::pwrdnconfig

Definition at line 19 of file dmc.h.

Referenced by ddr3_mem_ctrl_init().

pwrdnconfig [2/2]

uint32_t exynos5_dmc::pwrdnconfig

Definition at line 72 of file dmc.h.

qoscontrol0 [1/2]

unsigned int exynos5_dmc::qoscontrol0

Definition at line 32 of file dmc.h.

qoscontrol0 [2/2]

uint32_t exynos5_dmc::qoscontrol0

Definition at line 85 of file dmc.h.

qoscontrol1 [1/2]

unsigned int exynos5_dmc::qoscontrol1

Definition at line 34 of file dmc.h.

qoscontrol1 [2/2]

uint32_t exynos5_dmc::qoscontrol1

Definition at line 87 of file dmc.h.

qoscontrol10 [1/2]

unsigned int exynos5_dmc::qoscontrol10

Definition at line 52 of file dmc.h.

qoscontrol10 [2/2]

uint32_t exynos5_dmc::qoscontrol10

Definition at line 105 of file dmc.h.

qoscontrol11 [1/2]

unsigned int exynos5_dmc::qoscontrol11

Definition at line 54 of file dmc.h.

qoscontrol11 [2/2]

uint32_t exynos5_dmc::qoscontrol11

Definition at line 107 of file dmc.h.

qoscontrol12 [1/2]

unsigned int exynos5_dmc::qoscontrol12

Definition at line 56 of file dmc.h.

qoscontrol12 [2/2]

uint32_t exynos5_dmc::qoscontrol12

Definition at line 109 of file dmc.h.

qoscontrol13 [1/2]

unsigned int exynos5_dmc::qoscontrol13

Definition at line 58 of file dmc.h.

qoscontrol13 [2/2]

uint32_t exynos5_dmc::qoscontrol13

Definition at line 111 of file dmc.h.

qoscontrol14 [1/2]

unsigned int exynos5_dmc::qoscontrol14

Definition at line 60 of file dmc.h.

qoscontrol14 [2/2]

uint32_t exynos5_dmc::qoscontrol14

Definition at line 113 of file dmc.h.

qoscontrol15 [1/2]

unsigned int exynos5_dmc::qoscontrol15

Definition at line 62 of file dmc.h.

qoscontrol15 [2/2]

uint32_t exynos5_dmc::qoscontrol15

Definition at line 115 of file dmc.h.

qoscontrol2 [1/2]

unsigned int exynos5_dmc::qoscontrol2

Definition at line 36 of file dmc.h.

qoscontrol2 [2/2]

uint32_t exynos5_dmc::qoscontrol2

Definition at line 89 of file dmc.h.

qoscontrol3 [1/2]

unsigned int exynos5_dmc::qoscontrol3

Definition at line 38 of file dmc.h.

qoscontrol3 [2/2]

uint32_t exynos5_dmc::qoscontrol3

Definition at line 91 of file dmc.h.

qoscontrol4 [1/2]

unsigned int exynos5_dmc::qoscontrol4

Definition at line 40 of file dmc.h.

qoscontrol4 [2/2]

uint32_t exynos5_dmc::qoscontrol4

Definition at line 93 of file dmc.h.

qoscontrol5 [1/2]

unsigned int exynos5_dmc::qoscontrol5

Definition at line 42 of file dmc.h.

qoscontrol5 [2/2]

uint32_t exynos5_dmc::qoscontrol5

Definition at line 95 of file dmc.h.

qoscontrol6 [1/2]

unsigned int exynos5_dmc::qoscontrol6

Definition at line 44 of file dmc.h.

qoscontrol6 [2/2]

uint32_t exynos5_dmc::qoscontrol6

Definition at line 97 of file dmc.h.

qoscontrol7 [1/2]

unsigned int exynos5_dmc::qoscontrol7

Definition at line 46 of file dmc.h.

qoscontrol7 [2/2]

uint32_t exynos5_dmc::qoscontrol7

Definition at line 99 of file dmc.h.

qoscontrol8 [1/2]

unsigned int exynos5_dmc::qoscontrol8

Definition at line 48 of file dmc.h.

qoscontrol8 [2/2]

uint32_t exynos5_dmc::qoscontrol8

Definition at line 101 of file dmc.h.

qoscontrol9 [1/2]

unsigned int exynos5_dmc::qoscontrol9

Definition at line 50 of file dmc.h.

qoscontrol9 [2/2]

uint32_t exynos5_dmc::qoscontrol9

Definition at line 103 of file dmc.h.

rdlvl_config [1/2]

unsigned int exynos5_dmc::rdlvl_config

Definition at line 66 of file dmc.h.

Referenced by ddr3_mem_ctrl_init().

rdlvl_config [2/2]

uint32_t exynos5_dmc::rdlvl_config

Definition at line 123 of file dmc.h.

res1 [1/2]

uint8_t exynos5_dmc::res1[0x8]

Definition at line 71 of file dmc.h.

res1 [2/2]

unsigned char exynos5_dmc::res1[0xc]

Definition at line 18 of file dmc.h.

res10 [1/2]

unsigned char exynos5_dmc::res10[0x4]

Definition at line 43 of file dmc.h.

res10 [2/2]

uint8_t exynos5_dmc::res10[0x4]

Definition at line 96 of file dmc.h.

res11 [1/2]

unsigned char exynos5_dmc::res11[0x4]

Definition at line 45 of file dmc.h.

res11 [2/2]

uint8_t exynos5_dmc::res11[0x4]

Definition at line 98 of file dmc.h.

res12 [1/2]

unsigned char exynos5_dmc::res12[0x4]

Definition at line 47 of file dmc.h.

res12 [2/2]

uint8_t exynos5_dmc::res12[0x4]

Definition at line 100 of file dmc.h.

res13 [1/2]

unsigned char exynos5_dmc::res13[0x4]

Definition at line 49 of file dmc.h.

res13 [2/2]

uint8_t exynos5_dmc::res13[0x4]

Definition at line 102 of file dmc.h.

res14 [1/2]

unsigned char exynos5_dmc::res14[0x4]

Definition at line 51 of file dmc.h.

res14 [2/2]

uint8_t exynos5_dmc::res14[0x4]

Definition at line 104 of file dmc.h.

res15 [1/2]

unsigned char exynos5_dmc::res15[0x4]

Definition at line 53 of file dmc.h.

res15 [2/2]

uint8_t exynos5_dmc::res15[0x4]

Definition at line 106 of file dmc.h.

res16 [1/2]

unsigned char exynos5_dmc::res16[0x4]

Definition at line 55 of file dmc.h.

res16 [2/2]

uint8_t exynos5_dmc::res16[0x4]

Definition at line 108 of file dmc.h.

res17 [1/2]

unsigned char exynos5_dmc::res17[0x4]

Definition at line 57 of file dmc.h.

res17 [2/2]

uint8_t exynos5_dmc::res17[0x4]

Definition at line 110 of file dmc.h.

res18 [1/2]

unsigned char exynos5_dmc::res18[0x4]

Definition at line 59 of file dmc.h.

res18 [2/2]

uint8_t exynos5_dmc::res18[0x4]

Definition at line 112 of file dmc.h.

res19 [1/2]

unsigned char exynos5_dmc::res19[0x4]

Definition at line 61 of file dmc.h.

res19 [2/2]

uint8_t exynos5_dmc::res19[0x4]

Definition at line 114 of file dmc.h.

res2 [1/2]

unsigned char exynos5_dmc::res2[0x4]

Definition at line 26 of file dmc.h.

res2 [2/2]

uint8_t exynos5_dmc::res2[0x4]

Definition at line 79 of file dmc.h.

res20 [1/2]

unsigned char exynos5_dmc::res20[0x14]

Definition at line 63 of file dmc.h.

res20 [2/2]

uint8_t exynos5_dmc::res20[0x4]

Definition at line 116 of file dmc.h.

res21 [1/2]

uint8_t exynos5_dmc::res21[0x4]

Definition at line 124 of file dmc.h.

res21 [2/2]

unsigned char exynos5_dmc::res21[0x8]

Definition at line 67 of file dmc.h.

res22 [1/2]

unsigned char exynos5_dmc::res22[0xc]

Definition at line 72 of file dmc.h.

res22 [2/2]

uint8_t exynos5_dmc::res22[0xc]

Definition at line 130 of file dmc.h.

res22a

uint8_t exynos5_dmc::res22a[0xc]

Definition at line 140 of file dmc.h.

res23 [1/2]

uint8_t exynos5_dmc::res23[0x4]

Definition at line 134 of file dmc.h.

res23 [2/2]

unsigned char exynos5_dmc::res23[0xc]

Definition at line 74 of file dmc.h.

res23a

uint8_t exynos5_dmc::res23a[0x8]

Definition at line 143 of file dmc.h.

res24 [1/2]

uint8_t exynos5_dmc::res24[0x94]

Definition at line 147 of file dmc.h.

res24 [2/2]

unsigned char exynos5_dmc::res24[0xdebc]

Definition at line 80 of file dmc.h.

res25 [1/2]

uint8_t exynos5_dmc::res25[0x8]

Definition at line 150 of file dmc.h.

res25 [2/2]

unsigned char exynos5_dmc::res25[0xc]

Definition at line 82 of file dmc.h.

res26 [1/2]

uint8_t exynos5_dmc::res26[0x4]

Definition at line 154 of file dmc.h.

res26 [2/2]

unsigned char exynos5_dmc::res26[0xc]

Definition at line 84 of file dmc.h.

res27 [1/2]

uint8_t exynos5_dmc::res27[0x4]

Definition at line 158 of file dmc.h.

res27 [2/2]

unsigned char exynos5_dmc::res27[0xc]

Definition at line 86 of file dmc.h.

res28 [1/2]

uint8_t exynos5_dmc::res28[0x4]

Definition at line 162 of file dmc.h.

res28 [2/2]

unsigned char exynos5_dmc::res28[0xc]

Definition at line 88 of file dmc.h.

res29 [1/2]

uint8_t exynos5_dmc::res29[0xb4]

Definition at line 166 of file dmc.h.

res29 [2/2]

unsigned char exynos5_dmc::res29[0xc]

Definition at line 90 of file dmc.h.

res3 [1/2]

unsigned char exynos5_dmc::res3[0x4]

Definition at line 29 of file dmc.h.

res3 [2/2]

uint8_t exynos5_dmc::res3[0x4]

Definition at line 82 of file dmc.h.

res30 [1/2]

uint8_t exynos5_dmc::res30[0x4]

Definition at line 168 of file dmc.h.

res30 [2/2]

unsigned char exynos5_dmc::res30[0xac]

Definition at line 92 of file dmc.h.

res31 [1/2]

unsigned char exynos5_dmc::res31[0xc]

Definition at line 94 of file dmc.h.

res31 [2/2]

uint8_t exynos5_dmc::res31[0xdcf0]

Definition at line 171 of file dmc.h.

res32 [1/2]

unsigned char exynos5_dmc::res32[0xc]

Definition at line 96 of file dmc.h.

res32 [2/2]

uint8_t exynos5_dmc::res32[0xc]

Definition at line 173 of file dmc.h.

res33 [1/2]

unsigned char exynos5_dmc::res33[0xc]

Definition at line 98 of file dmc.h.

res33 [2/2]

uint8_t exynos5_dmc::res33[0xc]

Definition at line 175 of file dmc.h.

res34 [1/2]

unsigned char exynos5_dmc::res34[0xc]

Definition at line 100 of file dmc.h.

res34 [2/2]

uint8_t exynos5_dmc::res34[0xc]

Definition at line 177 of file dmc.h.

res35

uint8_t exynos5_dmc::res35[0xc]

Definition at line 179 of file dmc.h.

res36

uint8_t exynos5_dmc::res36[0xc]

Definition at line 181 of file dmc.h.

res37

uint8_t exynos5_dmc::res37[0xac]

Definition at line 183 of file dmc.h.

res38

uint8_t exynos5_dmc::res38[0xc]

Definition at line 185 of file dmc.h.

res39

uint8_t exynos5_dmc::res39[0xc]

Definition at line 187 of file dmc.h.

res4 [1/2]

unsigned char exynos5_dmc::res4[0x8]

Definition at line 31 of file dmc.h.

res4 [2/2]

uint8_t exynos5_dmc::res4[0x8]

Definition at line 84 of file dmc.h.

res40

uint8_t exynos5_dmc::res40[0xc]

Definition at line 189 of file dmc.h.

res41

uint8_t exynos5_dmc::res41[0xc]

Definition at line 191 of file dmc.h.

res6 [1/2]

unsigned char exynos5_dmc::res6[0x4]

Definition at line 35 of file dmc.h.

res6 [2/2]

uint8_t exynos5_dmc::res6[0x4]

Definition at line 88 of file dmc.h.

res7 [1/2]

unsigned char exynos5_dmc::res7[0x4]

Definition at line 37 of file dmc.h.

res7 [2/2]

uint8_t exynos5_dmc::res7[0x4]

Definition at line 90 of file dmc.h.

res8 [1/2]

unsigned char exynos5_dmc::res8[0x4]

Definition at line 39 of file dmc.h.

res8 [2/2]

uint8_t exynos5_dmc::res8[0x4]

Definition at line 92 of file dmc.h.

res9 [1/2]

unsigned char exynos5_dmc::res9[0x4]

Definition at line 41 of file dmc.h.

res9 [2/2]

uint8_t exynos5_dmc::res9[0x4]

Definition at line 94 of file dmc.h.

resr5 [1/2]

unsigned char exynos5_dmc::resr5[0x4]

Definition at line 33 of file dmc.h.

resr5 [2/2]

uint8_t exynos5_dmc::resr5[0x4]

Definition at line 86 of file dmc.h.

timing_set_sw

uint32_t exynos5_dmc::timing_set_sw

Definition at line 117 of file dmc.h.

timingdata [1/2]

unsigned int exynos5_dmc::timingdata

Definition at line 23 of file dmc.h.

Referenced by ddr3_mem_ctrl_init().

timingdata [2/2]

uint32_t exynos5_dmc::timingdata

Definition at line 76 of file dmc.h.

timingdata1

uint32_t exynos5_dmc::timingdata1

Definition at line 119 of file dmc.h.

timingpower [1/2]

unsigned int exynos5_dmc::timingpower

Definition at line 24 of file dmc.h.

Referenced by ddr3_mem_ctrl_init().

timingpower [2/2]

uint32_t exynos5_dmc::timingpower

Definition at line 77 of file dmc.h.

timingpower1

uint32_t exynos5_dmc::timingpower1

Definition at line 120 of file dmc.h.

timingpzq [1/2]

unsigned int exynos5_dmc::timingpzq

Definition at line 20 of file dmc.h.

timingpzq [2/2]

uint32_t exynos5_dmc::timingpzq

Definition at line 73 of file dmc.h.

timingref [1/2]

unsigned int exynos5_dmc::timingref

Definition at line 21 of file dmc.h.

Referenced by ddr3_mem_ctrl_init().

timingref [2/2]

uint32_t exynos5_dmc::timingref

Definition at line 74 of file dmc.h.

timingrow [1/2]

unsigned int exynos5_dmc::timingrow

Definition at line 22 of file dmc.h.

Referenced by ddr3_mem_ctrl_init().

timingrow [2/2]

uint32_t exynos5_dmc::timingrow

Definition at line 75 of file dmc.h.

timingrow1

uint32_t exynos5_dmc::timingrow1

Definition at line 118 of file dmc.h.

winconfig_ctrl_gate

uint32_t exynos5_dmc::winconfig_ctrl_gate

Definition at line 170 of file dmc.h.

winconfig_ctrl_read

uint32_t exynos5_dmc::winconfig_ctrl_read

Definition at line 169 of file dmc.h.

winconfig_odt_w

uint32_t exynos5_dmc::winconfig_odt_w

Definition at line 167 of file dmc.h.

wrlvl_config

unsigned int exynos5_dmc::wrlvl_config

Definition at line 73 of file dmc.h.

wrlvl_config0

uint32_t exynos5_dmc::wrlvl_config0

Definition at line 131 of file dmc.h.

wrlvl_config1

uint32_t exynos5_dmc::wrlvl_config1

Definition at line 132 of file dmc.h.

wrlvl_status

uint32_t exynos5_dmc::wrlvl_status

Definition at line 133 of file dmc.h.

wrtra_config [1/2]

unsigned int exynos5_dmc::wrtra_config

Definition at line 65 of file dmc.h.

wrtra_config [2/2]

uint32_t exynos5_dmc::wrtra_config

Definition at line 122 of file dmc.h.

---

The documentation for this struct was generated from the following file:

• src/soc/samsung/exynos5250/include/soc/dmc.h