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chip.h
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #ifndef __INTEL_MIPI_CAMERA_CHIP_H__
4 #define __INTEL_MIPI_CAMERA_CHIP_H__
5 
6 #include <stdint.h>
7 #include <acpi/acpi_pld.h>
8 
9 #define DEFAULT_LINK_FREQ 450000000
10 #define MAX_PWDB_ENTRIES 12
11 #define MAX_PORT_ENTRIES 4
12 #define MAX_LINK_FREQ_ENTRIES 4
13 #define MAX_CLK_CONFIGS 2
14 #define MAX_GPIO_CONFIGS 4
15 #define MAX_PWR_OPS 6
16 #define MAX_GUARDED_RESOURCES 10
17 #define IMGCLKOUT_0 0
18 #define IMGCLKOUT_1 1
19 #define IMGCLKOUT_2 2
20 #define IMGCLKOUT_3 3
21 #define IMGCLKOUT_4 4
22 #define IMGCLKOUT_5 5
23 #define FREQ_24_MHZ 0
24 #define FREQ_19_2_MHZ 1
25 
26 #define SEQ_OPS_CLK_ENABLE(ind, delay) \
27  { .type = IMGCLK, .index = (ind), .action = ENABLE, .delay_ms = (delay) }
28 #define SEQ_OPS_CLK_DISABLE(ind, delay) \
29  { .type = IMGCLK, .index = (ind), .action = DISABLE, .delay_ms = (delay) }
30 #define SEQ_OPS_GPIO_ENABLE(ind, delay) \
31  { .type = GPIO, .index = (ind), .action = ENABLE, .delay_ms = (delay) }
32 #define SEQ_OPS_GPIO_DISABLE(ind, delay) \
33  { .type = GPIO, .index = (ind), .action = DISABLE, .delay_ms = (delay) }
34 
39 };
40 
43  PLATFORM_CNL = 10
44 };
45 
49  FLASH_ENABLE = 3
50 };
51 
55 };
56 
60 };
61 
62 #define CLK_FREQ_19_2MHZ 19200000
63 #define CLK_FREQ_24MHZ 24000000
64 #define CLK_FREQ_20MHZ 20000000
65 
73 };
74 
79 };
80 
81 enum ctrl_type {
84  GPIO
85 };
86 
90  DISABLE
91 };
92 
96 };
97 
101 };
102 
104  enum action_type action;
105  enum ctrl_type type;
106  union {
107  const struct clk_config *clk_conf;
108  const struct gpio_config *gpio_conf;
109  };
110 };
111 
112 struct clk_config {
113  /* IMGCLKOUT_x being used for a port */
115  /* frequency setting: 0:24Mhz, 1:19.2 Mhz */
117 };
118 
119 struct gpio_config {
121 };
122 
125 };
126 
129 };
130 
132  enum ctrl_type type;
134  enum action_type action;
136 };
137 
141 };
142 
143 struct intel_ssdb {
144  uint8_t version; /* Current version */
145  uint8_t sensor_card_sku; /* CRD Board type */
146  uint8_t csi2_data_stream_interface[16]; /* CSI2 data stream GUID */
147  uint16_t bdf_value; /* Bus number of the host
148  controller */
149  uint32_t dphy_link_en_fuses; /* Host controller's fuses
150  information used to verify if
151  link is fused out or not */
152  uint32_t lanes_clock_division; /* Lanes/clock divisions per
153  sensor */
154  uint8_t link_used; /* Link used by this sensor
155  stream */
156  uint8_t lanes_used; /* Number of lanes connected for
157  the sensor */
158  uint32_t csi_rx_dly_cnt_termen_clane; /* MIPI timing information */
159  uint32_t csi_rx_dly_cnt_settle_clane; /* MIPI timing information */
160  uint32_t csi_rx_dly_cnt_termen_dlane0; /* MIPI timing information */
161  uint32_t csi_rx_dly_cnt_settle_dlane0; /* MIPI timing information */
162  uint32_t csi_rx_dly_cnt_termen_dlane1; /* MIPI timing information */
163  uint32_t csi_rx_dly_cnt_settle_dlane1; /* MIPI timing information */
164  uint32_t csi_rx_dly_cnt_termen_dlane2; /* MIPI timing information */
165  uint32_t csi_rx_dly_cnt_settle_dlane2; /* MIPI timing information */
166  uint32_t csi_rx_dly_cnt_termen_dlane3; /* MIPI timing information */
167  uint32_t csi_rx_dly_cnt_settle_dlane3; /* MIPI timing information */
168  uint32_t max_lane_speed; /* Maximum lane speed for
169  the sensor */
170  uint8_t sensor_cal_file_idx; /* Legacy field for sensor
171  calibration file index */
172  uint8_t sensor_cal_file_idx_mbz[3]; /* Legacy field for sensor
173  calibration file index */
174  uint8_t rom_type; /* NVM type of the camera
175  module */
176  uint8_t vcm_type; /* VCM type of the camera
177  module */
178  uint8_t platform; /* Platform information */
179  uint8_t platform_sub; /* Platform sub-categories */
180  uint8_t flash_support; /* Enable/disable flash
181  support */
182  uint8_t privacy_led; /* Privacy LED support */
183  uint8_t degree; /* Camera Orientation */
184  uint8_t mipi_define; /* MIPI info defined in ACPI or
185  sensor driver */
186  uint32_t mclk_speed; /* Clock info for sensor */
187  uint32_t mclk; /* Clock info for sensor */
188  uint8_t control_logic_id; /* PMIC device node used for
189  the camera sensor */
190  uint8_t mipi_data_format; /* MIPI data format */
191  uint8_t silicon_version; /* Silicon version */
192  uint8_t customer_id; /* Customer ID */
194  uint8_t reserved[13]; /* Pads SSDB out so the binary blob in ACPI is
195  the same size as seen on other firmwares.*/
197 
198 struct intel_pwdb {
199  char name[32]; /* Name of the resource required by the power
200  action */
201  uint32_t value; /* The value to be set for the power action */
202  uint32_t entry_type; /* The type of the current power action */
203  uint32_t delay_usec; /* The delay time after which power action is
204  performed and this is in unit of usec */
205 } __packed;
206 
210  struct operation_seq on_seq;
211  struct operation_seq off_seq;
212 
213  struct intel_ssdb ssdb;
217  const char *acpi_hid;
218  const char *acpi_name;
219  const char *chip_name;
220  unsigned int acpi_uid;
221  const char *pr0;
222 
223  /* Settings specific to CIO2 device */
228 
229  /* Settings specific to camera sensor */
231 
232  uint8_t num_freq_entries; /* # of elements in link_freq */
234  const char *sensor_name; /* default "UNKNOWN" */
235  const char *remote_name; /* default "\_SB.PCI0.CIO2" */
236  const char *vcm_name; /* defaults to |vcm_address| device */
237  bool use_pld;
239  struct acpi_pld pld;
240  uint16_t rom_address; /* I2C to use if ssdb.rom_type != 0 */
241  uint16_t vcm_address; /* I2C to use if ssdb.vcm_type != 0 */
242  /*
243  * Settings specific to nvram. Many values, if left as zero, will be assigned a default.
244  * Set disable_nvm_defaults to non-zero if you want to disable the defaulting behavior
245  * so you can use zero for a value.
246  */
252  const char *nvm_compat;
253 
254  /* Settings specific to vcm */
255  const char *vcm_compat;
256  /* Does the device have a power resource entries */
258  /* Perform low power probe */
260  /*
261  * This will create a _DSC method in ACPI which returns an integer, to tell the kernel
262  * the highest allowed D state for a device during probe
263  * Number State Description
264  * 0 D0 Device fully powered on
265  * 1 D1
266  * 2 D2
267  * 3 D3hot
268  * 4 D3cold Off
269  */
271 };
272 
273 #endif
ctrl_type
Definition: chip.h:81
@ GPIO
Definition: chip.h:84
@ IMGCLK
Definition: chip.h:83
@ UNKNOWN_CTRL
Definition: chip.h:82
#define MAX_PWDB_ENTRIES
Definition: chip.h:10
#define MAX_GPIO_CONFIGS
Definition: chip.h:14
intel_camera_platform_type
Definition: chip.h:41
@ PLATFORM_CNL
Definition: chip.h:43
@ PLATFORM_SKC
Definition: chip.h:42
intel_camera_flash_type
Definition: chip.h:46
@ FLASH_DISABLE
Definition: chip.h:48
@ FLASH_DEFAULT
Definition: chip.h:47
@ FLASH_ENABLE
Definition: chip.h:49
intel_camera_led_type
Definition: chip.h:52
@ PRIVACY_LED_DEFAULT
Definition: chip.h:53
@ PRIVACY_LED_A_16mA
Definition: chip.h:54
#define MAX_GUARDED_RESOURCES
Definition: chip.h:16
intel_camera_mipi_info
Definition: chip.h:57
@ MIPI_INFO_ACPI_DEFINED
Definition: chip.h:59
@ MIPI_INFO_SENSOR_DRIVER
Definition: chip.h:58
#define MAX_LINK_FREQ_ENTRIES
Definition: chip.h:12
struct intel_ssdb __packed
intel_camera_device_type
Definition: chip.h:66
@ INTEL_ACPI_CAMERA_NVM
Definition: chip.h:71
@ INTEL_ACPI_CAMERA_IMGU
Definition: chip.h:68
@ INTEL_ACPI_CAMERA_SENSOR
Definition: chip.h:69
@ INTEL_ACPI_CAMERA_VCM
Definition: chip.h:70
@ INTEL_ACPI_CAMERA_PMIC
Definition: chip.h:72
@ INTEL_ACPI_CAMERA_CIO2
Definition: chip.h:67
#define MAX_PWR_OPS
Definition: chip.h:15
action_type
Definition: chip.h:87
@ ENABLE
Definition: chip.h:89
@ DISABLE
Definition: chip.h:90
@ UNKNOWN_ACTION
Definition: chip.h:88
camera_device_type
Definition: chip.h:35
@ DEV_TYPE_ROM
Definition: chip.h:38
@ DEV_TYPE_SENSOR
Definition: chip.h:36
@ DEV_TYPE_VCM
Definition: chip.h:37
#define MAX_PORT_ENTRIES
Definition: chip.h:11
intel_power_action_type
Definition: chip.h:75
@ INTEL_ACPI_CAMERA_CLK
Definition: chip.h:77
@ INTEL_ACPI_CAMERA_REGULATOR
Definition: chip.h:76
@ INTEL_ACPI_CAMERA_GPIO
Definition: chip.h:78
#define MAX_CLK_CONFIGS
Definition: chip.h:13
unsigned short uint16_t
Definition: stdint.h:11
unsigned int uint32_t
Definition: stdint.h:14
unsigned char uint8_t
Definition: stdint.h:8
uint8_t id
Definition: chip.h:95
uint8_t type
Definition: chip.h:94
uint8_t freq
Definition: chip.h:116
uint8_t clknum
Definition: chip.h:114
struct clk_config clks[MAX_CLK_CONFIGS]
Definition: chip.h:124
uint32_t cio2_lanes_used[MAX_PORT_ENTRIES]
Definition: chip.h:225
uint32_t cio2_prt[MAX_PORT_ENTRIES]
Definition: chip.h:227
const char * cio2_lane_endpoint[MAX_PORT_ENTRIES]
Definition: chip.h:226
struct clock_ctrl_panel clk_panel
Definition: chip.h:208
enum intel_camera_device_type device_type
Definition: chip.h:215
struct gpio_ctrl_panel gpio_panel
Definition: chip.h:209
uint32_t link_freq[MAX_LINK_FREQ_ENTRIES]
Definition: chip.h:233
struct operation_seq off_seq
Definition: chip.h:211
struct intel_ssdb ssdb
Definition: chip.h:213
struct intel_pwdb pwdb[MAX_PWDB_ENTRIES]
Definition: chip.h:214
struct operation_seq on_seq
Definition: chip.h:210
uint16_t gpio_num
Definition: chip.h:120
Definition: pinmux.c:36
char name[32]
Definition: chip.h:199
uint32_t value
Definition: chip.h:201
uint32_t entry_type
Definition: chip.h:202
uint32_t delay_usec
Definition: chip.h:203
uint8_t mipi_data_format
Definition: chip.h:190
uint8_t degree
Definition: chip.h:183
uint8_t sensor_card_sku
Definition: chip.h:145
uint32_t mclk_speed
Definition: chip.h:186
uint8_t mclk_port
Definition: chip.h:193
uint32_t mclk
Definition: chip.h:187
uint32_t csi_rx_dly_cnt_termen_dlane3
Definition: chip.h:166
uint8_t customer_id
Definition: chip.h:192
uint32_t lanes_clock_division
Definition: chip.h:152
uint32_t csi_rx_dly_cnt_termen_dlane2
Definition: chip.h:164
uint32_t csi_rx_dly_cnt_settle_dlane0
Definition: chip.h:161
uint32_t dphy_link_en_fuses
Definition: chip.h:149
uint32_t csi_rx_dly_cnt_termen_dlane1
Definition: chip.h:162
uint8_t reserved[13]
Definition: chip.h:194
uint8_t version
Definition: chip.h:144
uint8_t lanes_used
Definition: chip.h:156
uint8_t platform_sub
Definition: chip.h:179
uint32_t max_lane_speed
Definition: chip.h:168
uint32_t csi_rx_dly_cnt_settle_dlane2
Definition: chip.h:165
uint8_t sensor_cal_file_idx
Definition: chip.h:170
uint32_t csi_rx_dly_cnt_settle_dlane3
Definition: chip.h:167
uint8_t mipi_define
Definition: chip.h:184
uint32_t csi_rx_dly_cnt_termen_dlane0
Definition: chip.h:160
uint8_t csi2_data_stream_interface[16]
Definition: chip.h:146
uint8_t silicon_version
Definition: chip.h:191
uint8_t sensor_cal_file_idx_mbz[3]
Definition: chip.h:172
uint32_t csi_rx_dly_cnt_settle_dlane1
Definition: chip.h:163
uint32_t csi_rx_dly_cnt_termen_clane
Definition: chip.h:158
uint16_t bdf_value
Definition: chip.h:147
uint8_t flash_support
Definition: chip.h:180
uint8_t vcm_type
Definition: chip.h:176
uint8_t platform
Definition: chip.h:178
uint8_t link_used
Definition: chip.h:154
uint8_t control_logic_id
Definition: chip.h:188
uint32_t csi_rx_dly_cnt_settle_clane
Definition: chip.h:159
uint8_t privacy_led
Definition: chip.h:182
uint8_t rom_type
Definition: chip.h:174
struct operation_type ops[MAX_PWR_OPS]
Definition: chip.h:139
uint8_t ops_cnt
Definition: chip.h:140
enum action_type action
Definition: chip.h:134
uint8_t index
Definition: chip.h:133
enum ctrl_type type
Definition: chip.h:132
uint32_t delay_ms
Definition: chip.h:135
enum action_type action
Definition: chip.h:104
const struct clk_config * clk_conf
Definition: chip.h:107
enum ctrl_type type
Definition: chip.h:105
const struct gpio_config * gpio_conf
Definition: chip.h:108