3 #ifndef __INTEL_MIPI_CAMERA_CHIP_H__
4 #define __INTEL_MIPI_CAMERA_CHIP_H__
9 #define DEFAULT_LINK_FREQ 450000000
10 #define MAX_PWDB_ENTRIES 12
11 #define MAX_PORT_ENTRIES 4
12 #define MAX_LINK_FREQ_ENTRIES 4
13 #define MAX_CLK_CONFIGS 2
14 #define MAX_GPIO_CONFIGS 4
16 #define MAX_GUARDED_RESOURCES 10
24 #define FREQ_19_2_MHZ 1
26 #define SEQ_OPS_CLK_ENABLE(ind, delay) \
27 { .type = IMGCLK, .index = (ind), .action = ENABLE, .delay_ms = (delay) }
28 #define SEQ_OPS_CLK_DISABLE(ind, delay) \
29 { .type = IMGCLK, .index = (ind), .action = DISABLE, .delay_ms = (delay) }
30 #define SEQ_OPS_GPIO_ENABLE(ind, delay) \
31 { .type = GPIO, .index = (ind), .action = ENABLE, .delay_ms = (delay) }
32 #define SEQ_OPS_GPIO_DISABLE(ind, delay) \
33 { .type = GPIO, .index = (ind), .action = DISABLE, .delay_ms = (delay) }
62 #define CLK_FREQ_19_2MHZ 19200000
63 #define CLK_FREQ_24MHZ 24000000
64 #define CLK_FREQ_20MHZ 20000000
intel_camera_platform_type
#define MAX_GUARDED_RESOURCES
@ MIPI_INFO_SENSOR_DRIVER
#define MAX_LINK_FREQ_ENTRIES
struct intel_ssdb __packed
@ INTEL_ACPI_CAMERA_SENSOR
@ INTEL_ACPI_CAMERA_REGULATOR
struct clk_config clks[MAX_CLK_CONFIGS]
uint32_t cio2_lanes_used[MAX_PORT_ENTRIES]
uint32_t cio2_prt[MAX_PORT_ENTRIES]
const char * cio2_lane_endpoint[MAX_PORT_ENTRIES]
struct clock_ctrl_panel clk_panel
enum intel_camera_device_type device_type
struct gpio_ctrl_panel gpio_panel
uint32_t link_freq[MAX_LINK_FREQ_ENTRIES]
bool disable_ssdb_defaults
struct operation_seq off_seq
uint8_t max_dstate_for_probe
bool disable_pld_defaults
bool disable_nvm_defaults
struct intel_pwdb pwdb[MAX_PWDB_ENTRIES]
struct operation_seq on_seq
uint32_t csi_rx_dly_cnt_termen_dlane3
uint32_t lanes_clock_division
uint32_t csi_rx_dly_cnt_termen_dlane2
uint32_t csi_rx_dly_cnt_settle_dlane0
uint32_t dphy_link_en_fuses
uint32_t csi_rx_dly_cnt_termen_dlane1
uint32_t csi_rx_dly_cnt_settle_dlane2
uint8_t sensor_cal_file_idx
uint32_t csi_rx_dly_cnt_settle_dlane3
uint32_t csi_rx_dly_cnt_termen_dlane0
uint8_t csi2_data_stream_interface[16]
uint8_t sensor_cal_file_idx_mbz[3]
uint32_t csi_rx_dly_cnt_settle_dlane1
uint32_t csi_rx_dly_cnt_termen_clane
uint32_t csi_rx_dly_cnt_settle_clane
struct operation_type ops[MAX_PWR_OPS]
const struct clk_config * clk_conf
const struct gpio_config * gpio_conf