coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
pci_devs.h
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #ifndef _PI_HUDSON_PCI_DEVS_H_
4 #define _PI_HUDSON_PCI_DEVS_H_
5 
6 #include <device/pci_def.h>
7 
8 #define BUS0 0
9 
10 /* XHCI */
11 #define XHCI_DEV 0x10
12 #define XHCI_FUNC 0
13 #define XHCI_DEVID 0x7814
14 #define XHCI_DEVFN PCI_DEVFN(XHCI_DEV, XHCI_FUNC)
15 
16 #define XHCI2_DEV 0x10
17 #define XHCI2_FUNC 1
18 #define XHCI2_DEVID 0x7814
19 #define XHCI2_DEVFN PCI_DEVFN(XHCI2_DEV, XHCI2_FUNC)
20 
21 /* SATA */
22 #define SATA_DEV 0x11
23 #define SATA_FUNC 0
24 #define SATA_IDE_DEVID 0x7800
25 #define AHCI_DEVID_MS 0x7801
26 #define AHCI_DEVID_AMD 0x7804
27 #define SATA_DEVFN PCI_DEVFN(SATA_DEV, SATA_FUNC)
28 
29 /* OHCI */
30 #define OHCI1_DEV 0x12
31 #define OHCI1_FUNC 0
32 #define OHCI2_DEV 0x13
33 #define OHCI2_FUNC 0
34 #define OHCI3_DEV 0x16
35 #define OHCI3_FUNC 0
36 #define OHCI4_DEV 0x14
37 #define OHCI4_FUNC 5
38 #define OHCI_DEVID 0x7807
39 #define OHCI1_DEVFN PCI_DEVFN(OHCI1_DEV, OHCI1_FUNC)
40 #define OHCI2_DEVFN PCI_DEVFN(OHCI2_DEV, OHCI2_FUNC)
41 #define OHCI3_DEVFN PCI_DEVFN(OHCI3_DEV, OHCI3_FUNC)
42 #define OHCI4_DEVFN PCI_DEVFN(OHCI4_DEV, OHCI4_FUNC)
43 
44 /* EHCI */
45 #define EHCI1_DEV 0x12
46 #define EHCI1_FUNC 2
47 #define EHCI2_DEV 0x13
48 #define EHCI2_FUNC 2
49 #define EHCI3_DEV 0x16
50 #define EHCI3_FUNC 2
51 #define EHCI_DEVID 0x7808
52 #define EHCI1_DEVFN PCI_DEVFN(EHCI1_DEV, EHCI1_FUNC)
53 #define EHCI2_DEVFN PCI_DEVFN(EHCI2_DEV, EHCI2_FUNC)
54 #define EHCI3_DEVFN PCI_DEVFN(EHCI3_DEV, EHCI3_FUNC)
55 
56 /* SMBUS */
57 #define SMBUS_DEV 0x14
58 #define SMBUS_FUNC 0
59 #define SMBUS_DEVID 0x780B
60 #define SMBUS_DEVFN PCI_DEVFN(SMBUS_DEV, SMBUS_FUNC)
61 
62 /* HD Audio */
63 #define HDA_DEV 0x14
64 #define HDA_FUNC 2
65 #define HDA_DEVID 0x780D
66 #define HDA_DEVFN PCI_DEVFN(HDA_DEV, HDA_FUNC)
67 
68 /* LPC BUS */
69 #define PCU_DEV 0x14
70 #define LPC_DEV PCU_DEV
71 #define LPC_FUNC 3
72 #define LPC_DEVID 0x780E
73 #define LPC_DEVFN PCI_DEVFN(LPC_DEV, LPC_FUNC)
74 
75 /* PCI Ports */
76 #define SB_PCI_PORT_DEV 0x14
77 #define SB_PCI_PORT_FUNC 4
78 #define SB_PCI_PORT_DEVID 0x780F
79 #define SB_PCI_PORT_DEVFN PCI_DEVFN(SB_PCI_PORT_DEV, SB_PCI_PORT_FUNC)
80 
81 /* SD Controller */
82 #define SD_DEV 0x14
83 #define SD_FUNC 7
84 #define SD_DEVID 0x7806
85 #define SD_DEVFN PCI_DEVFN(SD_DEV, SD_FUNC)
86 
87 #endif /* _PI_HUDSON_PCI_DEVS_H_ */