coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
Public Types | Data Fields
northbridge_intel_sandybridge_config Struct Reference

#include <chip.h>

Collaboration diagram for northbridge_intel_sandybridge_config:
Collaboration graph

Public Types

enum  { PANEL_PORT_LVDS = 0 , PANEL_PORT_DP_A = 1 , PANEL_PORT_DP_C = 2 , PANEL_PORT_DP_D = 3 }
 
enum  { DDR_NMODE_AUTO = 0 , DDR_NMODE_1N , DDR_NMODE_2N }
 
enum  { DDR_REFRESH_RATE_TEMP_THRES = 0 , DDR_REFRESH_REATE_NORMAL , DDR_REFRESH_RATE_DOUBLE }
 

Data Fields

u8 gpu_dp_b_hotplug
 
u8 gpu_dp_c_hotplug
 
u8 gpu_dp_d_hotplug
 
enum northbridge_intel_sandybridge_config:: { ... }  gpu_panel_port_select
 
u8 gpu_panel_power_cycle_delay
 
u16 gpu_panel_power_up_delay
 
u16 gpu_panel_power_down_delay
 
u16 gpu_panel_power_backlight_on_delay
 
u16 gpu_panel_power_backlight_off_delay
 
u32 gpu_cpu_backlight
 
u32 gpu_pch_backlight
 
u16 max_mem_clock_mhz
 
struct i915_gpu_controller_info gfx
 
u8 spd_addresses [4]
 
u8 ts_addresses [4]
 
bool ec_present
 
bool ddr3lv_support
 
enum northbridge_intel_sandybridge_config:: { ... }  nmode
 
enum northbridge_intel_sandybridge_config:: { ... }  ddr_refresh_rate_config
 
u16 usb_port_config [16][3]
 
struct {
   u8   mode: 2
 
   u8   hs_port_switch_mask: 4
 
   u8   preboot_support: 1
 
   u8   xhci_streams: 1
 
} usb3
 

Detailed Description

Definition at line 17 of file chip.h.

Member Enumeration Documentation

◆ anonymous enum

anonymous enum
Enumerator
PANEL_PORT_LVDS 
PANEL_PORT_DP_A 
PANEL_PORT_DP_C 
PANEL_PORT_DP_D 

Definition at line 22 of file chip.h.

◆ anonymous enum

anonymous enum
Enumerator
DDR_NMODE_AUTO 
DDR_NMODE_1N 
DDR_NMODE_2N 

Definition at line 63 of file chip.h.

◆ anonymous enum

anonymous enum
Enumerator
DDR_REFRESH_RATE_TEMP_THRES 
DDR_REFRESH_REATE_NORMAL 
DDR_REFRESH_RATE_DOUBLE 

Definition at line 77 of file chip.h.

Field Documentation

◆ ddr3lv_support

bool northbridge_intel_sandybridge_config::ddr3lv_support

Definition at line 55 of file chip.h.

Referenced by devicetree_fill_pei_data().

◆ 

enum { ... } northbridge_intel_sandybridge_config::ddr_refresh_rate_config

Referenced by devicetree_fill_pei_data().

◆ ec_present

bool northbridge_intel_sandybridge_config::ec_present

Definition at line 54 of file chip.h.

Referenced by devicetree_fill_pei_data().

◆ gfx

struct i915_gpu_controller_info northbridge_intel_sandybridge_config::gfx

Definition at line 42 of file chip.h.

◆ gpu_cpu_backlight

u32 northbridge_intel_sandybridge_config::gpu_cpu_backlight

Definition at line 35 of file chip.h.

Referenced by gma_pm_init_post_vbios().

◆ gpu_dp_b_hotplug

u8 northbridge_intel_sandybridge_config::gpu_dp_b_hotplug

Definition at line 18 of file chip.h.

Referenced by gma_pm_init_post_vbios().

◆ gpu_dp_c_hotplug

u8 northbridge_intel_sandybridge_config::gpu_dp_c_hotplug

Definition at line 19 of file chip.h.

Referenced by gma_pm_init_post_vbios().

◆ gpu_dp_d_hotplug

u8 northbridge_intel_sandybridge_config::gpu_dp_d_hotplug

Definition at line 20 of file chip.h.

Referenced by gma_pm_init_post_vbios().

◆ 

enum { ... } northbridge_intel_sandybridge_config::gpu_panel_port_select

Referenced by gma_pm_init_post_vbios().

◆ gpu_panel_power_backlight_off_delay

u16 northbridge_intel_sandybridge_config::gpu_panel_power_backlight_off_delay

Definition at line 33 of file chip.h.

Referenced by gma_pm_init_post_vbios().

◆ gpu_panel_power_backlight_on_delay

u16 northbridge_intel_sandybridge_config::gpu_panel_power_backlight_on_delay

Definition at line 32 of file chip.h.

Referenced by gma_pm_init_post_vbios().

◆ gpu_panel_power_cycle_delay

u8 northbridge_intel_sandybridge_config::gpu_panel_power_cycle_delay

Definition at line 29 of file chip.h.

Referenced by gma_pm_init_post_vbios().

◆ gpu_panel_power_down_delay

u16 northbridge_intel_sandybridge_config::gpu_panel_power_down_delay

Definition at line 31 of file chip.h.

Referenced by gma_pm_init_post_vbios().

◆ gpu_panel_power_up_delay

u16 northbridge_intel_sandybridge_config::gpu_panel_power_up_delay

Definition at line 30 of file chip.h.

Referenced by gma_pm_init_post_vbios().

◆ gpu_pch_backlight

u32 northbridge_intel_sandybridge_config::gpu_pch_backlight

Definition at line 36 of file chip.h.

Referenced by gma_pm_init_post_vbios().

◆ hs_port_switch_mask

u8 northbridge_intel_sandybridge_config::hs_port_switch_mask

Definition at line 107 of file chip.h.

Referenced by devicetree_fill_pei_data().

◆ max_mem_clock_mhz

u16 northbridge_intel_sandybridge_config::max_mem_clock_mhz

Definition at line 42 of file chip.h.

Referenced by devicetree_fill_pei_data(), and get_mem_min_tck().

◆ mode

u8 northbridge_intel_sandybridge_config::mode

Definition at line 105 of file chip.h.

Referenced by devicetree_fill_pei_data().

◆ 

enum { ... } northbridge_intel_sandybridge_config::nmode

Referenced by devicetree_fill_pei_data().

◆ preboot_support

u8 northbridge_intel_sandybridge_config::preboot_support

Definition at line 109 of file chip.h.

Referenced by devicetree_fill_pei_data().

◆ spd_addresses

u8 northbridge_intel_sandybridge_config::spd_addresses[4]

Definition at line 49 of file chip.h.

Referenced by devicetree_fill_pei_data().

◆ ts_addresses

u8 northbridge_intel_sandybridge_config::ts_addresses[4]

Definition at line 52 of file chip.h.

Referenced by devicetree_fill_pei_data().

◆ 

struct { ... } northbridge_intel_sandybridge_config::usb3

Referenced by devicetree_fill_pei_data().

◆ usb_port_config

u16 northbridge_intel_sandybridge_config::usb_port_config[16][3]

Definition at line 101 of file chip.h.

Referenced by devicetree_fill_pei_data().

◆ xhci_streams

u8 northbridge_intel_sandybridge_config::xhci_streams

Definition at line 111 of file chip.h.

Referenced by devicetree_fill_pei_data().

The documentation for this struct was generated from the following file: