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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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Data Fields | |
u32 | ridr |
u32 | pir |
u32 | pgcr |
u32 | pgsr |
u32 | dllgcr |
u32 | acdllcr |
u32 | ptr [3] |
u32 | aciocr |
u32 | dxccr |
u32 | dsgcr |
u32 | dcr |
u32 | dtpr [3] |
u32 | mr [4] |
u32 | odtcr |
u32 | dtar |
u32 | dtdr [2] |
u32 | reserved1 [24] |
u32 | dcuar |
u32 | dcudr |
u32 | dcurr |
u32 | dculr |
u32 | dcugcr |
u32 | dcutpr |
u32 | dcusr [2] |
u32 | reserved2 [8] |
u32 | bist [17] |
u32 | reserved3 [15] |
u32 | zq0cr [2] |
u32 | zq0sr [2] |
u32 | zq1cr [2] |
u32 | zq1sr [2] |
u32 | zq2cr [2] |
u32 | zq2sr [2] |
u32 | zq3cr [2] |
u32 | zq3sr [2] |
struct rk3288_ddr_publ_datx | datx8 [4] |
u32 rk3288_ddr_publ_regs::acdllcr |
Definition at line 176 of file sdram.c.
Referenced by phy_dll_bypass_set(), and phy_pctrl_reset().
struct rk3288_ddr_publ_datx rk3288_ddr_publ_regs::datx8[4] |
Definition at line 205 of file sdram.c.
Referenced by data_training(), phy_cfg(), phy_dll_bypass_set(), phy_pctrl_reset(), and set_bandwidth_ratio().
u32 rk3288_ddr_publ_regs::dcr |
Definition at line 181 of file sdram.c.
Referenced by dram_cfg_rbc(), and phy_cfg().
u32 rk3288_ddr_publ_regs::dllgcr |
Definition at line 175 of file sdram.c.
Referenced by phy_dll_bypass_set().
u32 rk3288_ddr_publ_regs::pgcr |
Definition at line 173 of file sdram.c.
Referenced by data_training(), phy_cfg(), and sdram_init().
u32 rk3288_ddr_publ_regs::pgsr |
Definition at line 174 of file sdram.c.
Referenced by data_training(), memory_init(), move_to_access_state(), move_to_config_state(), and phy_init().
u32 rk3288_ddr_publ_regs::pir |
Definition at line 172 of file sdram.c.
Referenced by data_training(), memory_init(), phy_dll_bypass_set(), and phy_init().
u32 rk3288_ddr_publ_regs::zq0cr[2] |
Definition at line 198 of file sdram.c.
Referenced by sdram_init().
u32 rk3288_ddr_publ_regs::zq1cr[2] |
Definition at line 200 of file sdram.c.
Referenced by sdram_init().