coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
ptn3460.h
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #ifndef _I2C_PTN3460_H_
4 #define _I2C_PTN3460_H_
5 
6 #include <types.h>
7 
8 #define PTN_EDID_OFF 0x00
9 #define PTN_EDID_LEN 0x80
10 #define PTN_CONFIG_OFF 0x80
11 #define PTN_CONFIG_LEN 0x19
12 #define PTN_FLASH_CFG_OFF 0xE8
13 #define PTN_FLASH_CFG_LEN 0x04
14 #define PTN_MAX_EDID_NUM 6
15 #define PTN_ENABLE_EMULATION (1 << 0)
16 
17 /* Define some error codes that can be used */
18 #define PTN_SUCCESS 0x00000000
19 #define PTN_CFG_MODIFIED 0x00000001
20 #define PTN_BUS_ERROR 0x10000000
21 #define PTN_INVALID_EDID 0x20000000
22 #define PTN_INVALID_EDID_BLOCK 0x30000000
23 #define PTN_ERROR 0x40000000
24 
26  u8 dp_interface_ctrl; /* DisplayPort interface control */
27  u8 lvds_interface_ctrl1; /* LVDS interface control register 1 */
28  u8 lvds_interface_ctrl2; /* LVDS interface control register 2 */
29  u8 lvds_interface_ctrl3; /* LVDS interface control register 3 */
30  u8 edid_rom_emulation; /* select which EDID-block is emulated */
31  u8 edid_rom_access_ctrl; /* select which EDID block to map to 0..0x7F */
32  u8 pwm_min[3]; /* smallest PWM frequency for back light */
33  u8 pwm_max[3]; /* biggest PWM frequency for back light */
34  u8 fast_link_ctrl; /* Fast link training control register */
35  u8 pin_cfg_ctrl1; /* Pin configuration control register 1 */
36  u8 pin_cfg_ctrl2; /* Pin configuration control register 2 */
37  u8 pwm_default; /* Default PWM bit count in DPCD register */
38  u16 pwm_value; /* Current PWM bit count in DPCD register */
39  u8 pwm_default_freq; /* Default PWM frequency in DPCD register */
40  u8 t3_timing; /* Panel T3 timing value */
41  u8 t12_timing; /* Panel T12 timing value */
42  u8 backlight_ctrl; /* Back light control register */
43  u8 t2_delay; /* Panel T2 delay */
44  u8 t4_timing; /* Panel T4 timing value */
45  u8 t5_delay; /* Panel T5 delay */
47 
49  u8 cmd; /* Flash command (erase or erase and flash) */
50  u16 magic; /* Magic number needed by the flash algorithm */
51  u8 trigger; /* Trigger for starting flash operation */
52 } __packed;
53 
54 /* We need functions which we can call to get mainboard specific data */
55 /* These functions can be implemented somewhere else but must exist. */
56 extern enum cb_err mb_get_edid(uint8_t edid_data[0x80]);
57 extern uint8_t mb_select_edid_table(void);
58 extern int mb_adjust_cfg(struct ptn_3460_config *cfg_ptr);
59 
60 #endif /* _I2C_PTN3460_H_ */
cb_err
coreboot error codes
Definition: cb_err.h:15
struct ptn_3460_config __packed
uint8_t mb_select_edid_table(void)
This function provides EDID block [0..6] to the driver for DP2LVDS Bridge (PTN3460) which has to be u...
Definition: ptn3460.c:118
int mb_adjust_cfg(struct ptn_3460_config *cfg_ptr)
Function to enable mainboard to adjust the config data of PTN3460.
Definition: ptn3460.c:122
enum cb_err mb_get_edid(uint8_t edid_data[0x80])
This function provides EDID data to the driver for DP2LVDS Bridge (PTN3460)
Definition: ptn3460.c:114
uint16_t u16
Definition: stdint.h:48
uint8_t u8
Definition: stdint.h:45
unsigned char uint8_t
Definition: stdint.h:8
u8 pwm_min[3]
Definition: ptn3460.h:32
u8 edid_rom_access_ctrl
Definition: ptn3460.h:31
u8 pin_cfg_ctrl1
Definition: ptn3460.h:35
u8 lvds_interface_ctrl3
Definition: ptn3460.h:29
u8 edid_rom_emulation
Definition: ptn3460.h:30
u8 dp_interface_ctrl
Definition: ptn3460.h:26
u8 backlight_ctrl
Definition: ptn3460.h:42
u8 pin_cfg_ctrl2
Definition: ptn3460.h:36
u8 fast_link_ctrl
Definition: ptn3460.h:34
u8 lvds_interface_ctrl2
Definition: ptn3460.h:28
u8 lvds_interface_ctrl1
Definition: ptn3460.h:27
u8 pwm_max[3]
Definition: ptn3460.h:33
u8 pwm_default_freq
Definition: ptn3460.h:39