coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
clock.c File Reference
#include <device/mmio.h>
#include <console/console.h>
#include <soc/clock.h>
#include <soc/addressmap.h>
#include <stdint.h>
Include dependency graph for clock.c:

Go to the source code of this file.

Data Structures

struct  prci_ctlr
 

Macros

#define FU540_BASE_FQY   33330
 
#define PRCI_CORECLK_MASK   1
 
#define PRCI_CORECLK_CORE_PLL   0
 
#define PRCI_CORECLK_HFCLK   1
 
#define PRCI_PLLCFG_LOCK   (1u << 31)
 
#define PRCI_PLLCFG_DIVR_SHIFT   0
 
#define PRCI_PLLCFG_DIVF_SHIFT   6
 
#define PRCI_PLLCFG_DIVQ_SHIFT   15
 
#define PRCI_PLLCFG_RANGE_SHIFT   18
 
#define PRCI_PLLCFG_BYPASS_SHIFT   24
 
#define PRCI_PLLCFG_FSE_SHIFT   25
 
#define PRCI_PLLCFG_DIVR_MASK   (0x03f << PRCI_PLLCFG_DIVR_SHIFT)
 
#define PRCI_PLLCFG_DIVF_MASK   (0x1ff << PRCI_PLLCFG_DIVF_SHIFT)
 
#define PRCI_PLLCFG_DIVQ_MASK   (0x007 << PRCI_PLLCFG_DIVQ_SHIFT)
 
#define PRCI_PLLCFG_RANGE_MASK   (0x07 << PRCI_PLLCFG_RANGE_SHIFT)
 
#define PRCI_PLLCFG_BYPASS_MASK   (0x1 << PRCI_PLLCFG_BYPASS_SHIFT)
 
#define PRCI_PLLCFG_FSE_MASK   (0x1 << PRCI_PLLCFG_FSE_SHIFT)
 
#define PRCI_DDRPLLCFG1_MASK   (1u << 31)
 
#define PRCI_GEMGXLPPLCFG1_MASK   (1u << 31)
 
#define PRCI_CORECLKSEL_CORECLKSEL   1
 
#define PRCI_DEVICESRESET_DDR_CTRL_RST_N(x)   (((x) & 0x1) << 0)
 
#define PRCI_DEVICESRESET_DDR_AXI_RST_N(x)   (((x) & 0x1) << 1)
 
#define PRCI_DEVICESRESET_DDR_AHB_RST_N(x)   (((x) & 0x1) << 2)
 
#define PRCI_DEVICESRESET_DDR_PHY_RST_N(x)   (((x) & 0x1) << 3)
 
#define PRCI_DEVICESRESET_GEMGXL_RST_N(x)   (((x) & 0x1) << 5)
 

Functions

int clock_get_coreclk_khz (void)
 
int clock_get_tlclk_khz (void)
 

Variables

static struct prci_ctlrprci = (void *)FU540_PRCI
 

Macro Definition Documentation

◆ FU540_BASE_FQY

#define FU540_BASE_FQY   33330

Definition at line 10 of file clock.c.

◆ PRCI_CORECLK_CORE_PLL

#define PRCI_CORECLK_CORE_PLL   0

Definition at line 29 of file clock.c.

◆ PRCI_CORECLK_HFCLK

#define PRCI_CORECLK_HFCLK   1

Definition at line 30 of file clock.c.

◆ PRCI_CORECLK_MASK

#define PRCI_CORECLK_MASK   1

Definition at line 28 of file clock.c.

◆ PRCI_CORECLKSEL_CORECLKSEL

#define PRCI_CORECLKSEL_CORECLKSEL   1

Definition at line 50 of file clock.c.

◆ PRCI_DDRPLLCFG1_MASK

#define PRCI_DDRPLLCFG1_MASK   (1u << 31)

Definition at line 46 of file clock.c.

◆ PRCI_DEVICESRESET_DDR_AHB_RST_N

#define PRCI_DEVICESRESET_DDR_AHB_RST_N (   x)    (((x) & 0x1) << 2)

Definition at line 54 of file clock.c.

◆ PRCI_DEVICESRESET_DDR_AXI_RST_N

#define PRCI_DEVICESRESET_DDR_AXI_RST_N (   x)    (((x) & 0x1) << 1)

Definition at line 53 of file clock.c.

◆ PRCI_DEVICESRESET_DDR_CTRL_RST_N

#define PRCI_DEVICESRESET_DDR_CTRL_RST_N (   x)    (((x) & 0x1) << 0)

Definition at line 52 of file clock.c.

◆ PRCI_DEVICESRESET_DDR_PHY_RST_N

#define PRCI_DEVICESRESET_DDR_PHY_RST_N (   x)    (((x) & 0x1) << 3)

Definition at line 55 of file clock.c.

◆ PRCI_DEVICESRESET_GEMGXL_RST_N

#define PRCI_DEVICESRESET_GEMGXL_RST_N (   x)    (((x) & 0x1) << 5)

Definition at line 56 of file clock.c.

◆ PRCI_GEMGXLPPLCFG1_MASK

#define PRCI_GEMGXLPPLCFG1_MASK   (1u << 31)

Definition at line 48 of file clock.c.

◆ PRCI_PLLCFG_BYPASS_MASK

#define PRCI_PLLCFG_BYPASS_MASK   (0x1 << PRCI_PLLCFG_BYPASS_SHIFT)

Definition at line 43 of file clock.c.

◆ PRCI_PLLCFG_BYPASS_SHIFT

#define PRCI_PLLCFG_BYPASS_SHIFT   24

Definition at line 37 of file clock.c.

◆ PRCI_PLLCFG_DIVF_MASK

#define PRCI_PLLCFG_DIVF_MASK   (0x1ff << PRCI_PLLCFG_DIVF_SHIFT)

Definition at line 40 of file clock.c.

◆ PRCI_PLLCFG_DIVF_SHIFT

#define PRCI_PLLCFG_DIVF_SHIFT   6

Definition at line 34 of file clock.c.

◆ PRCI_PLLCFG_DIVQ_MASK

#define PRCI_PLLCFG_DIVQ_MASK   (0x007 << PRCI_PLLCFG_DIVQ_SHIFT)

Definition at line 41 of file clock.c.

◆ PRCI_PLLCFG_DIVQ_SHIFT

#define PRCI_PLLCFG_DIVQ_SHIFT   15

Definition at line 35 of file clock.c.

◆ PRCI_PLLCFG_DIVR_MASK

#define PRCI_PLLCFG_DIVR_MASK   (0x03f << PRCI_PLLCFG_DIVR_SHIFT)

Definition at line 39 of file clock.c.

◆ PRCI_PLLCFG_DIVR_SHIFT

#define PRCI_PLLCFG_DIVR_SHIFT   0

Definition at line 33 of file clock.c.

◆ PRCI_PLLCFG_FSE_MASK

#define PRCI_PLLCFG_FSE_MASK   (0x1 << PRCI_PLLCFG_FSE_SHIFT)

Definition at line 44 of file clock.c.

◆ PRCI_PLLCFG_FSE_SHIFT

#define PRCI_PLLCFG_FSE_SHIFT   25

Definition at line 38 of file clock.c.

◆ PRCI_PLLCFG_LOCK

#define PRCI_PLLCFG_LOCK   (1u << 31)

Definition at line 32 of file clock.c.

◆ PRCI_PLLCFG_RANGE_MASK

#define PRCI_PLLCFG_RANGE_MASK   (0x07 << PRCI_PLLCFG_RANGE_SHIFT)

Definition at line 42 of file clock.c.

◆ PRCI_PLLCFG_RANGE_SHIFT

#define PRCI_PLLCFG_RANGE_SHIFT   18

Definition at line 36 of file clock.c.

Function Documentation

◆ clock_get_coreclk_khz()

int clock_get_coreclk_khz ( void  )

Definition at line 253 of file clock.c.

References BIOS_SPEW, prci_ctlr::coreclksel, prci_ctlr::corepllcfg0, FU540_BASE_FQY, prci, PRCI_CORECLK_MASK, PRCI_PLLCFG_DIVF_MASK, PRCI_PLLCFG_DIVF_SHIFT, PRCI_PLLCFG_DIVQ_MASK, PRCI_PLLCFG_DIVQ_SHIFT, PRCI_PLLCFG_DIVR_MASK, PRCI_PLLCFG_DIVR_SHIFT, printk, and read32().

Referenced by clock_get_tlclk_khz().

Here is the call graph for this function:
Here is the caller graph for this function:

◆ clock_get_tlclk_khz()

int clock_get_tlclk_khz ( void  )

Definition at line 274 of file clock.c.

References clock_get_coreclk_khz().

Referenced by fu540_spi_setup(), and uart_platform_refclk().

Here is the call graph for this function:
Here is the caller graph for this function:

Variable Documentation

◆ prci

struct prci_ctlr* prci = (void *)FU540_PRCI
static

Definition at line 26 of file clock.c.

Referenced by clock_get_coreclk_khz().