Go to the source code of this file.
|
enum | { SW_SRCLKEN_FPM_MSK = 0x1
, SW_SRCLKEN_BBLPM_MSK = 0x1
} |
|
enum | { PMIC_PMRC_CON0 = 0x1A6
, PMIC_PMRC_CON0_SET = 0x1A8
, PMIC_PMRC_CON0_CLR = 0x1AA
} |
|
enum | chn_id {
CHN_SUSPEND = 0
, CHN_RF = 1
, CHN_DEEPIDLE = 2
, CHN_MD = 3
,
CHN_GPS = 4
, CHN_BT = 5
, CHN_WIFI = 6
, CHN_MCU = 7
,
CHN_COANT = 8
, CHN_NFC = 9
, CHN_UFS = 10
, CHN_SCP = 11
,
CHN_RESERVE = 12
, MAX_CHN_NUM
} |
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enum | { SRCLKENAO_MODE
, VREQ_MODE
} |
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enum | {
MERGE_OR_MODE = 0x0
, BYPASS_MODE = 0x1
, MERGE_AND_MODE = 0x1 << 1
, BYPASS_RC_MODE = 0x2 << 1
,
BYPASS_OTHER_MODE = 0x3 << 1
, ASYNC_MODE = 0x1 << 3
} |
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enum | { RC_32K = 0
, RC_ULPOSC1
} |
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enum | rc_ctrl_m { HW_MODE = 0
, SW_MODE = 1
, INIT_MODE = 0xff
} |
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enum | rc_support { SRCLKEN_RC_ENABLE = 0
, SRCLKEN_RC_DISABLE
} |
|
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| check_member (mtk_rc_regs, rc_central_cfg1, 0x4) |
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| check_member (mtk_rc_regs, rc_mxx_srclken_cfg[0], 0x20) |
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| check_member (mtk_rc_regs, rc_mxx_srclken_cfg[12], 0x50) |
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| check_member (mtk_rc_regs, rc_central_cfg4, 0x58) |
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| check_member (mtk_rc_regs, rc_protocol_chk_cfg, 0x60) |
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| check_member (mtk_rc_regs, rc_misc_0, 0xb4) |
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| check_member (mtk_rc_regs, rc_subsys_intf_cfg, 0xbc) |
|
| check_member (mtk_rc_status_regs, rc_cmd_sta_1, 0x8) |
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| check_member (mtk_rc_status_regs, rc_mxx_req_sta_0[0], 0x14) |
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| check_member (mtk_rc_status_regs, rc_mxx_req_sta_0[13], 0x48) |
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| check_member (mtk_rc_status_regs, rc_debug_trace, 0x54) |
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int | srclken_rc_init (void) |
|
◆ anonymous enum
Enumerator |
---|
SW_SRCLKEN_FPM_MSK | |
SW_SRCLKEN_BBLPM_MSK | |
Definition at line 110 of file srclken_rc.h.
◆ anonymous enum
Enumerator |
---|
PMIC_PMRC_CON0 | |
PMIC_PMRC_CON0_SET | |
PMIC_PMRC_CON0_CLR | |
Definition at line 122 of file srclken_rc.h.
◆ anonymous enum
Enumerator |
---|
SRCLKENAO_MODE | |
VREQ_MODE | |
Definition at line 145 of file srclken_rc.h.
◆ anonymous enum
Enumerator |
---|
MERGE_OR_MODE | |
BYPASS_MODE | |
MERGE_AND_MODE | |
BYPASS_RC_MODE | |
BYPASS_OTHER_MODE | |
ASYNC_MODE | |
Definition at line 150 of file srclken_rc.h.
◆ anonymous enum
◆ chn_id
Enumerator |
---|
CHN_SUSPEND | |
CHN_RF | |
CHN_DEEPIDLE | |
CHN_MD | |
CHN_GPS | |
CHN_BT | |
CHN_WIFI | |
CHN_MCU | |
CHN_COANT | |
CHN_NFC | |
CHN_UFS | |
CHN_SCP | |
CHN_RESERVE | |
MAX_CHN_NUM | |
Definition at line 128 of file srclken_rc.h.
◆ rc_ctrl_m
Enumerator |
---|
HW_MODE | |
SW_MODE | |
INIT_MODE | |
Definition at line 164 of file srclken_rc.h.
◆ rc_support
Enumerator |
---|
SRCLKEN_RC_ENABLE | |
SRCLKEN_RC_DISABLE | |
Definition at line 170 of file srclken_rc.h.
◆ check_member() [1/11]
◆ check_member() [2/11]
◆ check_member() [3/11]
◆ check_member() [4/11]
check_member |
( |
mtk_rc_regs |
, |
|
|
rc_mxx_srclken_cfg |
[0], |
|
|
0x20 |
|
|
) |
| |
◆ check_member() [5/11]
check_member |
( |
mtk_rc_regs |
, |
|
|
rc_mxx_srclken_cfg |
[12], |
|
|
0x50 |
|
|
) |
| |
◆ check_member() [6/11]
check_member |
( |
mtk_rc_regs |
, |
|
|
rc_protocol_chk_cfg |
, |
|
|
0x60 |
|
|
) |
| |
◆ check_member() [7/11]
check_member |
( |
mtk_rc_regs |
, |
|
|
rc_subsys_intf_cfg |
, |
|
|
0xbc |
|
|
) |
| |
◆ check_member() [8/11]
◆ check_member() [9/11]
◆ check_member() [10/11]
◆ check_member() [11/11]
◆ srclken_rc_init()
int srclken_rc_init |
( |
void |
| ) |
|
Definition at line 240 of file srclken_rc.c.
References _BF_VALUE, DCXO_FPM_CTRL_MODE, DCXO_SETTLE_TIME, FPM_MSK_B, IS_SPI2PMIC_SET_CLR, IS_SPI_DONE_RELEASE, KEEP_RC_SPI_ACTIVE_VAL, MAX_CHN_NUM, MD0_SRCLKENO_0_MASK_B, PMIC_PMRC_CON0, PMIC_PMRC_CON0_CLR, PMIC_PMRC_CON0_SET, pmic_read(), PWRAP_CTRL_M, mtk_rc_regs::rc_central_cfg1, mtk_rc_regs::rc_central_cfg2, mtk_rc_regs::rc_central_cfg3, mtk_rc_regs::rc_central_cfg4, RC_CENTRAL_DISABLE, RC_CENTRAL_ENABLE, mtk_rc_regs::rc_cmd_arb_cfg, rc_ctrl, rc_ctrl_mode_switch_init(), mtk_rc_regs::rc_dcxo_fpm_cfg, rc_dump_reg_info(), rc_info, rc_init_subsys_hw_mode(), rc_init_subsys_lpm(), mtk_rc_status_regs::rc_mxx_req_sta_0, mtk_rc_regs::rc_mxx_srclken_cfg, mtk_rc_regs::rc_pmic_rcen_addr, mtk_rc_regs::rc_pmic_rcen_set_clr_addr, rc_regs, rc_sta_regs, mtk_rc_regs::rc_subsys_intf_cfg, read32(), retry, SET32_BITFIELDS, SPI_CLK_SRC, SPI_TRIG_MODE, mtk_rc_regs::srclken_rc_cfg, srclken_rc_chk_init_cfg(), SRCLKEN_RC_EN_SEL_VAL, SRCLKEN_RC_ENABLE, SRCLKENO_0_CTRL_M, SUB_BBLPM_SET, SUB_FPM_SET, subsys_rc_con::sw_fpm, SW_SRCLKEN_BBLPM_MSK, SW_SRCLKEN_FPM_MSK, udelay(), ULPOSC_CTRL_M_VAL, ULPOSC_SETTLE_TIME, VCORE_SETTLE_TIME, VREQ_CTRL_M, write32(), and XO_SETTLE_TIME.
Referenced by platform_romstage_main().